AD9269-80EBZ Analog Devices Inc, AD9269-80EBZ Datasheet - Page 11

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AD9269-80EBZ

Manufacturer Part Number
AD9269-80EBZ
Description
A/D Converter Eval. Board
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD9269-80EBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
ADC
Kit Application Type
Data Converter
Silicon Core Number
AD9269
Kit Contents
Software, Evaluation Board
Number Of Adc's
2
Number Of Bits
16
Sampling Rate (per Second)
80M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
224.6mW @ 80MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9269
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Evaluation Board User Guide
Troubleshooting Tips
If the FFT plot appears abnormal, do the following:
If the FFT appears normal but the performance is poor, check
the following:
If you see a normal noise floor when you disconnect the
signal generator from the analog input, be sure you are not
overdriving the ADC. Reduce the input level, if necessary.
In VisualAnalog, click the Settings button in the Input
Formatter block. Check that Number Format is set to the
correct encoding (offset binary by default). Repeat for the
other channel.
Make sure an appropriate filter is used on the analog input.
Make sure the signal generators for the clock and the analog
input are clean (low phase noise).
Change the analog input frequency slightly if noncoherent
sampling is being used.
Make sure the SPI config file matches the product being
evaluated.
Rev. A | Page 11 of 40
If the FFT window remains blank after Run is clicked, do the
following:
If VisualAnalog indicates that the FIFO Capture timed out,
do the following:
Make sure the evaluation board is securely connected to
the HSC-ADC-EVALCZ board.
Make sure the FPGA has been programmed by verifying
that the DONE LED is illuminated on the HSC-ADC-
EVALCZ board. If this LED is not illuminated, make sure
the U4 switch on the board is in the correct position for
USB CONFIG.
Make sure the correct FPGA program was installed by
selecting the Settings button in the ADC Data Capture
block in VisualAnalog. Then select the FPGA tab and
verify that the proper FPGA bin file is selected for the part.
Make sure all power and USB connections are secure.
Probe the DCOA signal at RN801 (Pin 2) on the evaluation
board and confirm that a clock signal is present at the
ADC sampling rate.
UG-003

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