EVAL-ADF4360-7EBZ1 Analog Devices Inc, EVAL-ADF4360-7EBZ1 Datasheet - Page 14
EVAL-ADF4360-7EBZ1
Manufacturer Part Number
EVAL-ADF4360-7EBZ1
Description
PLL/Frequency Synthesizer EVAL BOARD
Manufacturer
Analog Devices Inc
Datasheet
1.ADF4360-7BCPZ.pdf
(28 pages)
Specifications of EVAL-ADF4360-7EBZ1
Silicon Manufacturer
Analog Devices
Application Sub Type
Integer-N Synthesizer
Kit Application Type
Clock & Timing
Silicon Core Number
ADF4360-7
Kit Contents
Board
Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
ADF4360-7
Primary Attributes
Single Integer-N PLL with VCO
Secondary Attributes
900MHz, 200kHz PFD
Frequency
1.8GHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
EVAL-ADF4360-7EB1
EVAL-ADF4360-7EB1
Q5173330
Q5652985
EVAL-ADF4360-7EB1
Q5173330
Q5652985
ADF4360-7
Table 7. Control Latch
PRESCALER
DB23
P2
0
0
1
1
P2
VALUE
DB22
P1
P1
0
1
0
1
DB21
CE PIN
0
1
1
1
PD2
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
PRESCALER VALUE
8/9
32/33
32/33
PD1
16/17
PD2
X
X
0
1
CPI6
CPI6
CPI3
0
0
0
0
1
1
1
1
SETTING 2
CURRENT
CPI5
PD1
X
0
1
1
CPI5
CPI2
0
0
1
1
0
0
1
1
CPI4
PL2
0
0
1
1
MODE
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
ASYNCHRONOUS POWER-DOWN
SYNCHRONOUS POWER-DOWN
CPI3
CPI4
CPI1
0
1
0
1
0
1
0
1
PL1
0
1
0
1
SETTING 1
CURRENT
CPI2
OUTPUT POWER LEVEL
CURRENT
3.5mA
5.0mA
7.5mA
11.0mA
4.7kΩ
0.31
0.62
0.93
1.25
1.56
1.87
2.18
2.50
I
CP
CPI1
(mA)
PL2
OUTPUT
POWER
LEVEL
POWER INTO 50Ω (USING 50Ω TO V
–14dBm
–11dBm
–8dBm
–5dBm
Rev. A | Page 14 of 28
PL1
MTLD
MTLD
0
1
CPG
MUTE-TILL-LOCK DETECT
DISABLED
ENABLED
0
1
CPG
CP GAIN
CURRENT SETTING 1
CURRENT SETTING 2
CP
DB9
CP
0
1
PDP
0
1
CHARGE PUMP
OUTPUT
NORMAL
THREE-STATE
VCO
DB8
PDP
)
PHASE DETECTOR
POLARITY
NEGATIVE
POSITIVE
DB7
M3
CONTROL
MUXOUT
0
0
0
0
1
1
1
1
M3
DB6
M2
DB5
M1
M2
0
0
1
1
0
0
1
1
CR
0
1
DB4
CR
M1
0
1
0
1
0
1
0
1
PC2
0
0
1
1
COUNTER
OPERATION
NORMAL
R, A, B COUNTERS
HELD IN RESET
PC2
DB3
POWER
LEVEL
CORE
PC1
0
1
0
1
N DIVIDER OUTPUT
DV
R DIVIDER OUTPUT
N-CHANNEL OPEN-DRAIN
LOCK DETECT
DGND
OUTPUT
THREE-STATE OUTPUT
DIGITAL LOCK DETECT
(ACTIVE HIGH)
SERIAL DATA OUTPUT
DD
DB2
PC1
CORE POWER LEVEL
5mA
10mA
15mA
20mA
C2 (0) C1 (0)
DB1
CONTROL
BITS
DB0