ADP1882-0.6-EVALZ Analog Devices Inc, ADP1882-0.6-EVALZ Datasheet - Page 28

• Manufacturer Part Number: ADP1882-0.6-EVALZ
• Description: 600 KHz Synchronous Current-Mode Buck Controller Eval. Board
• Manufacturer: Analog Devices Inc

Specifications of ADP1882-0.6-EVALZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: PWM Buck Controller
• Kit Application Type: Power Management - Voltage Regulator
• Silicon Core Number: ADP1882
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADP1882/ADP1883
THERMAL CONSIDERATIONS
The ADP1882/ADP1883 are used for dc-to-dc, step down, high
current applications that have an on-board controller and on-board
MOSFET drivers. Because applications may require up to 20 A
of load current delivery and be subjected to high ambient
temperature surroundings, the selection of external upper-side
and lower-side MOSFETs must be associated with careful thermal
consideration to not exceed the maximum allowable junction
temperature of 125°C. To avoid permanent or irreparable damage
if the junction temperature reaches or exceeds 155°C, the part
enters thermal shutdown, turning off both external MOSFETs,
and does not reenable until the junction temperature cools to
140°C (see the Thermal Shutdown section).
The maximum junction temperature allowed for the ADP1882/
ADP1883 ICs is 125°C. This means that the sum of the ambient
temperature (T
is caused by the thermal impedance of the package and the internal
power dissipation, should not exceed 125°C, as dictated by the
following expression:
where:
T
T
T
dissipated from within.
The rise in package temperature is directly proportional to its
thermal impedance characteristics. The following equation
represents this proportionality relationship:
where:
θ
the outside surface of the die, where it meets the surrounding air.
P
The bulk of the power dissipated is due to the gate capacitance
of the external MOSFETs. The power loss equation of the MOSFET
drivers (see the MOSFET Driver Loss section in the Efficiency
Consideration section) is
where:
C
C
I
lower-side drivers.
V
minus the rectifier drop (see Figure 81)).
V
BIAS
JA
DR(LOSS)
A
J
R
upperFET
lowerFET
DR
DD
is the maximum junction temperature.
is the rise in package temperature due to the power
is the ambient temperature.
is the thermal resistance of the package from the junction to
is the driver bias voltage (that is, the low input voltage (V
is the dc current (2 mA) flowing into the upper-side and
is the bias voltage
T
T
P
+ [V
J
R
DR(LOSS)
= T
= θ
is the input gate capacitance of the lower-side MOSFET.
is the input gate capacitance of the upper-side MOSFET.
is the overall power dissipated by the IC.
DD
R
JA
× (f
× T
= [V
× P
A
SW
) and the rise in package temperature (T
A
DR(LOSS)
DR
C
lowerFET
× (f
SW
V
C
DD
upperFET
+ I
BIAS
V
DR
)]
+ I
BIAS
)]
R
), which
Rev. 0 | Page 28 of 40
DD
)
For example, if the external MOSFET characteristics are θ
(10-lead MSOP) = 171.2°C/W, f
C
then the power loss is
The rise in package temperature is
Assuming a maximum ambient temperature environment of 85°C,
the junction temperature is
which is below the maximum junction temperature of 125°C.
DESIGN EXAMPLE
The ADP1882/ADP1883 are easy to use, requiring only a few
design criteria. For example, the example outlined in this section
uses only four design criteria: V
V
Input Capacitor
The maximum input voltage ripple is usually 1% of the
minimum input voltage (11.8 V × 0.01 = 120 mV).
Choose five 22 μF ceramic capacitors. The overall ESR of five
22 μF ceramic capacitors is less than 1 mΩ.
upperFET
IN
= 12 V (typical), and f
P
+ [V
= [5.12 × (300 × 10
+ [5.5 × (300 × 10
= 77.13 mW
T
= 171.2°C × 77.13 mW
= 13.2°C
T
V
V
= 120 mV − (15 A × 0.001) = 45 mV
= 120 μF
I
P
C
RMS
DR(LOSS)
CIN
R
J
RIPP
MAX,RIPPLE
IN,min
= T
= 3.3 nF, C
= θ
= I
= (I
DD
= 120 mV
R
JA
=
LOAD
× (f
× T
= [V
RMS
× P
4
= V
SW
f
/2 = 7.5 A
)
A
DR(LOSS)
SW
2
I
DR
= 13.2°C + 85°C = 98.2°C
C
lowerFET
× ESR = (7.5A)
LOAD
V
RIPP
lowerFET
× (f
MAX
,
− (I
MAX
3
SW
= 3.3 nF, V
,
3
×3.3 × 10
RIPPLE
V
× 3.3 × 10
C
SW
LOAD,MAX
DD
upperFET
= 300 kHz.
+ I
=
OUT
SW
BIAS
4
V
2
−9
×
= 1.8 V, I
DR
× ESR)
× 1 mΩ = 56.25 mW
= 300 kHz, I
DR
)]
300
−9
× 5.5 + 0.002)]
= 5.12 V, and V
+ I
× 5.12 + 0.002)]
×
BIAS
15
10
LOAD
3
)]
A
×
105
= 15 A (pulsing),
BIAS
mV
= 2 mA,
DD
= 5.5 V,
JA