CDB5541 Cirrus Logic Inc, CDB5541 Datasheet

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CDB5541

Manufacturer Part Number
CDB5541
Description
Development Kit
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDB5541

Silicon Manufacturer
Cirrus Logic
Application Sub Type
ADC
Kit Application Type
Data Converter
Silicon Core Number
CS5541
Features
RS-232 Serial Communication With PC, Chip Control And Data Capture, FFT Analysis
Kit Contents
Board
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
l
l
l
l
l
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
RS-232 Serial Communication with PC
On-board Microcontroller
On-board Voltage Reference
LabWindows
– Chip Control and Data Capture
– FFT Analysis
– Time Domain Analysis
– Noise Histogram Analysis
Supports the CS5540 and CS5541 16-pin
ADCs
REF+
REF-
AIN1+
AIN1-
AIN2+
AIN2-
CDB5540/41 Evaluation Board and Software
VA-
/CVI
REFERENCE
VOLTAGE
Evaluation Software
CS5540
CS5541
32.768 kHz
CRYSTAL
SCLK
SDO
SDI
CS
VA+
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright  Cirrus Logic, Inc. 2001
General Description
The CDB5540/41 is an inexpensive tool designed to
evaluate the performance of the CS5540/41 16-pin Ana-
log to Digital Converters. This document, as well as the
CS5540 or CS5541 data sheet should be read thorough-
ly before using the CDB5540/41 Evaluation System.
The evaluation system consists of a CDB5540/41 Board
and PC software which allows the user to easily capture
and analyze data. The provided analysis functions in the
software include Time Domain Analysis, Histogram
Analysis, and Frequency Domain Analysis.
ORDERING INFORMATION:
SWITCHES
TEST
(All Rights Reserved)
CDB5540
CDB5541
LEDs
AGND
Microcontroller
VA+
3.684 MHz
CRYSTAL
AVR
Evaluation System
Evaluation System
CDB5540
CDB5541
CIRCUITRY
RESET
TRANS-
CEIVER
RS232
CONNECTOR
DS503DB1
JUL ‘01
RS232
1

Related parts for CDB5541

CDB5541 Summary of contents

Page 1

... CS SDI SDO SCLK This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright  Cirrus Logic, Inc. 2001 (All Rights Reserved) CDB5540 CDB5541 Evaluation System Evaluation System VA+ RESET CIRCUITRY RS232 TRANS- AVR CEIVER ...

Page 2

... Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade- marks and service marks can be found at http://www.cirrus.com. 2 CDB5540 CDB5541 DS503DB1 ...

Page 3

... Figure 10.Microcontroller, Test Switches and LED’s .................................................................... 17 Figure 11.CDB5540/41 Layout (Silkscreen).................................................................................. 18 Figure 12.CDB5540/41 Layout (Top) ............................................................................................ 19 Figure 13.CDB5540/41 Layout (Bottom)....................................................................................... 20 LIST OF TABLES Table 1. Default Header and DIP Switch Settings .......................................................................... 6 Table 2. Voltage Reference Settings .............................................................................................. 6 Table 3. MCLK Settings .................................................................................................................. 6 Table 4. DIP Switch SW1 Settings.................................................................................................. 6 DS503DB1 CDB5540 CDB5541 3 ...

Page 4

... HARDWARE 1.1 Introduction The CDB5540 and CDB5541 evaluation systems provide a quick means of testing the CS5540 and CS5541 Analog-to-Digital Converters (ADCs). The CS5540/41 are low-power, low-voltage ∆−Σ analog-to-digital converters (ADC), targeted at temperature and pressure measurement, and vari- ous portable devices where low power consump- tion is required ...

Page 5

... DIP switch SW1 is used to control the AVR modes and Table 4 illustrates the various modes it can be set to. When testing the RS-232 link in the PC soft- ware, the DIP switches should all be in the CLOSED position. Configurations other than those specified are not recommended. CDB5540 CDB5541 5 ...

Page 6

... O XTAL SW3 is OPEN XOSC CS5541 O O XTAL SW1 is OPEN XOSC SW2 is CLOSED SW3 is OPEN RS-232 Test Mode SW1 is CLOSED SW2 is CLOSED SW3 is CLOSED CDB5540 CDB5541 Default Setting Default Jumpers O O Mode XTAL O O MCLK MCLK XOSC O O MCLK XREF VREF- VA- ...

Page 7

... Using the Software At start-up, the title screen appears first (Figure 1). This window contains information concerning the DS503DB1 CDB5540 CDB5541 software’s title, revision number, copyright date, etc. Additionally, at the top of the screen is a menu bar which displays user options. Notice, the menu bar item Window is initially disabled ...

Page 8

... The ADC will power down according to the data sheet specifications. SPI Init: This button issues an SPI Initialization command to the CS5541. 8 CDB5540 CDB5541 Command Word Components Channel Select: This pull-down menu allows the user to select which channel the ADC will convert. In the CS5541, this affects the command word. De- fault selection is “ ...

Page 9

... Click on RESTORE when done with the zoom function to display the entire data set graph. A region can also be DS503DB1 CDB5540 CDB5541 magnified further by clicking on the ZOOM button again. RESTORE: Restores the display of the graph after zoom has been entered ...

Page 10

... S/N+D: Indicator for the Signal-to-Noise + Distor- tion Ratio in dB. This is the ratio of the signal mag- 10 CDB5540 CDB5541 nitude to the magnitude of the first four harmonics and the noise. SNR: Indicator for the Signal-to-Noise Ratio in dB. This is the ratio of the signal magnitude to the magnitude of the noise (an average noise value is included in place of the first four harmonics) ...

Page 11

... DS503DB1 Figure 1. Title Screen Figure 2. Setup Window CDB5540 CDB5541 11 ...

Page 12

... Figure 3. Frequency Domain Analysis Figure 4. Configuration Panel CDB5540 CDB5541 DS503DB1 ...

Page 13

... DS503DB1 Figure 5. Time Domain Analysis Figure 6. Histogram Analysis CDB5540 CDB5541 13 ...

Page 14

... CDB5540 CDB5541 DS503DB1 ...

Page 15

... DS503DB1 CDB5540 CDB5541 15 ...

Page 16

... O VREF+ REF VREF+ XREF VREF+ VA VREF+ VA VREF+ REF VREF+ XREF VREF+ VA VREF+ VA VREF+ REF VREF+ Voltage Reference Settings CDB5540 CDB5541 TERM_BLOCK XOSC XOSC AIN2+ 2 AIN2- DGND 1 J5 DGND REF 4.7UF .1UF TANT REF- TERM_BLOCK XREF+ 2 XREF- VREF HDR9 XREF VREF- VA- ...

Page 17

... R7 DS503DB1 OPEN 5.11K R16 5.11K R15 5.11K R14 3.6864MHZ Y1 CDB5540 CDB5541 17 ...

Page 18

... CDB5540 CDB5541 DS503DB1 ...

Page 19

... DS503DB1 CDB5540 CDB5541 19 ...

Page 20

... CDB5540 CDB5541 DS503DB1 ...

Page 21

Notes • ...

Page 22

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