SK-86R01 Fujitsu, SK-86R01 Datasheet - Page 32

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SK-86R01

Manufacturer Part Number
SK-86R01
Description
KIT, STARTER, JADE, MB86R01
Manufacturer
Fujitsu
Type
Evaluation Boardr
Datasheet

Specifications of SK-86R01

Kit Contents
A Base Board, A Graphics Subboard, A Video Extension Input Board, A Video Extension Output Board
Mcu Supported Families
MB86R01
Silicon Manufacturer
Fujitsu
Core Architecture
ARM
Core Sub-architecture
ARM926EJ-S
Features
Built-in SRAM, Remap/Boot Control Function
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
FUJITSU MICROELECTRONICS
PROPRIETARY AND CONFIDENTIAL
MB86R01 DATA SHEET
7.2.24.
No.
Pin
10
11
12
14
15
16
17
18
19
21
22
23
24
28
29
30
31
32
33
34
35
36
38
39
40
41
42
43
44
3
4
5
6
7
9
Proceed following processes for unused pin.
JEDEC
AF14 AD_AVS
AF10 IDE_XDCS[1], Reserved (output)
AF11 MPX_MODE_5[1]
AF13 AD_AVD
AF15 UART_SOUT0
AF16 UART_SIN0
AF17 UART_SIN1
AF18 SD_DAT[0]
AF19 SD_WP
AA1 CCLK1
AD1 I2S_ECLK2, BI1[5], Reserved (input/output),
AB1 VINFID1, I2S_SDO1
AC1 I2S_SCK2, BI1[4], SPI_SCK
AF3
AF5
AF6
AF7
AF8
AF9
AF4
M1
W1
C1
D1
G1
K1
R1
U1
V1
E1
F1
L1
P1
T1
J1
DOUTB1[2], MEM_XWR[2], DOUTB0[0]
DOUTB1[6], MEM_ED[18], DOUTR0[0]
DOUTG1[4], MEM_ED[22], GPIO_PD[8]
DOUTR1[2], MEM_ED[26], GPIO_PD[12]
DCLKIN1
DCLKO1
VIN0[5]
VIN0[1]
CCLK0
USB_AVSP
USB_HSDP
USB_HSDM
USB_AVSF2
USB_CRYCK48
VIN1[6], RI1[6], GPIO_PD[4]
GPIO_PD[0]
IDE_XIOCS16, I2S_SDI1
IDE_XDRESET, Reserved (output)
IDE_DD[12], CAN_RX1
IDE_DD[8], GPIO_PD[20]
IDE_DD[4], GPIO_PD[16]
IDE_DD[0], Reserved (input/output)
IDE_CSEL, Reserved (output)
Unused pin
Pin name
26
Pull up to VDDE or pull down to VSS through high
resistance.
Keep the pin open.
Pull up to VDDE or pull down to VSS through high
resistance.
Connect to VSS.
Pull down to VSS through 10kΩ resistance.
Connect to VSS.
Pull up to VDDE or pull down to VSS through high
resistance.
Pull up to VDDE or pull down to VSS through high
resistance.
Pull up to VDDE or pull down to VSS through high
resistance.
Keep the pin open.
Pull up to VDDE or pull down to VSS through high
resistance.
Connect to VSS.
Keep the pin open.
Pull up to VDDE or pull down to VSS through high
resistance.
Keep the pin open.
Keep the pin open.
Process

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