EVAL-ADUC842QSZ Analog Devices Inc, EVAL-ADUC842QSZ Datasheet - Page 9

• Manufacturer Part Number: EVAL-ADUC842QSZ
• Description: Analog MCU Evaluation Board
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC842QSZ

• Silicon Manufacturer: Analog Devices
• Core Architecture: 8052
• Silicon Core Number: ADuC842
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC824
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
P1.1/ADC1/T2EX
*EXTCLK NOT PRESENT ON THE ADuC841
Table 3. Pin Function Descriptions
Mnemonic
DV
AV
C
V
AGND
P1.0–P1.7
ADC0–ADC7
T2
T2EX
SS
SDATA
SCLOCK
MOSI
MISO
DAC0
DAC1
RESET
REF
REF
P1.5/ADC5/SS
P1.0/ADC0/T2
DD
DD
P1.2/ADC2
P1.3/ADC3
P1.4/ADC4
P1.6/ADC6
AGND
DAC0
DAC1
AV
C
V
REF
REF
DD
10
11
12
13
1
2
3
4
5
6
7
8
9
52 51 50 49 48
14 15 16 17 18 19 20 21 22 23 24 25 26
Type
P
P
I/O
NC
G
I
I
I
I
I
I/O
I/O
I/O
I/O
O
O
I
ADuC841/ADuC842/ADuC843
PIN 1
IDENTIFIER
Figure 3. 52-Lead PQPF
52-LEAD PQFP
Analog Inputs. Eight single-ended analog inputs. Channel selection is via ADCCON2 SFR.
Digital Input. A high level on this pin for 24 master clock cycles while the oscillator is running resets the device.
Function
Digital Positive Supply Voltage. 3 V or 5 V nominal.
Analog Positive Supply Voltage. 3 V or 5 V nominal.
Decoupling Input for On-Chip Reference. Connect a 0.47 µF capacitor between this pin and AGND.
Not connected. This was reference out on the ADuC812; the C
Analog Ground. Ground reference point for the analog circuitry.
Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults to analog input mode. To configure any of
these port pins as a digital input, write a 0 to the port bit.
Timer 2 Digital Input. Input to Timer/Counter 2. When enabled, Counter 2 is incremented in response to a 1-to-0
transition of the T2 input.
Digital Input. Capture/reload trigger for Counter 2; also functions as an up/down control input for Counter 2.
Slave Select Input for the SPI Interface.
User Selectable, I
Serial Clock Pin for I
SPI Master Output/Slave Input Data I/O Pin for SPI Interface.
SPI Master Input/Slave Output Data I/O Pin for SPI Serial Interface.
Voltage Output from DAC0. This pin is a no connect on the ADuC843.
Voltage Output from DAC1. This pin is a no connect on the ADuC843.
(Not to Scale)
TOP VIEW
47 46 45 44
43 42 41 40
2
C Compatible, or SPI Data Input/Output Pin.
2
C Compatible or for SPI Serial Interface Clock.
39
38
37
36
35
34
33
32
31
30
29
28
27
P2.7/PWM1/A15/A23
P2.6/PWM0/A14/A22
P2.5/A13/A21
P2.4/A12/A20
DGND
DV
XTAL2
XTAL1
P2.3/A11/A19
P2.2/A10/A18
P2.1/A9/A17
P2.0/A8/A16
SDATA/MOSI
DD
Rev. 0 | Page 9 of 88
P1.1/ADC1/T2EX
P1.5/ADC5/SS
P1.3/ADC3
P1.4/ADC4
P1.2/ADC2
*EXTCLK NOT PRESENT ON THE ADuC841
AGND
AGND
AGND
DAC0
DAC1
AV
AV
C
V
REF
REF
DD
DD
REF
10
11
12
13
14
1
2
3
4
5
6
7
8
9
pin should be used instead.
ADuC841/ADuC842/ADuC843
PIN 1
IDENTIFIER
ADuC841/ADuC842/ADuC843
Figure 4. 56-Lead CSP
56-LEAD CSP
(Not to Scale)
TOP VIEW
42
41
40
39
38
37
36
35
34
33
32
31
30
29
P2.4/A12/A20
DGND
DGND
XTAL2
P2.7/A15/A23
P2.6/A14/A22
P2.5/A13/A21
DV
XTAL1
P2.3/A11/A19
P2.2/A10/A18
P2.1/A9/A17
P2.0/A8/A16
SDATA/MOSI
DD