CME12BC32 AXIOM, CME12BC32 Datasheet - Page 18
![Microprocessor Development Tool](/photos/24/13/241369/3751745_sml.jpg)
CME12BC32
Manufacturer Part Number
CME12BC32
Description
Microprocessor Development Tool
Manufacturer
AXIOM
Datasheet
1.CME12BC32.pdf
(18 pages)
Specifications of CME12BC32
Silicon Manufacturer
Freescale
Core Architecture
HC12
Kit Contents
Development Board With 64K SRAM And 32K Flash
Silicon Family Name
HC12
Silicon Core Number
68HC12BC32, 68HC12B32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ASM <Address>
BAUD <baudrate>
BF <StartAddress> <EndAddress>
[<data>]
BR [<Address>]
BULK
CALL [<Address>]
DEVICE [<DevName>
[<Address>...<Address>]]
EEBASE <Address>
FBULK
FLOAD [<AddressOffset>]
G [<Address>]
GT <Address>
HELP
LOAD [<AddressOffset>]
MD <StartAddress> [<EndAddress>]
MDW <StartAddress> [<EndAddress>] Memory Display Words
MM <StartAddress>
MMW <StartAddress>
MOVE <StartAddress> <EndAddress>
<DestAddress>
NOBR [<address>]
RD
REGBASE <Address>
RESET
RM
STOP
T
UPLOAD
<EndAddress>
USEHBR
VERF
<Register Name> <Register Value>
<CR>
<CR>
</> or <=>
<^> or <->
<.>
[<count>]
<.>
[<AddressOffset>]
Register Names:
CCR Status Bits:
<StartAddress>
18
Single line assembler/disassembler
Disassemble next instruction
Exit assembly/disassembly
Set communications rate for the terminal
Fill memory with data
Set/Display user breakpoints
Erase entire on-chip EEPROM contents
Call user subroutine at <Address>
display/select/add target device
Set base address of on-chip EEPROM
Erase entire target FLASH contents
Load S-Records into target FLASH
Begin/continue execution of user code
Set temporary breakpoint at <Address> &
execute user code
Display this D-Bug12 command summary
Load S-Records into memory
Memory Display Bytes
Modify Memory Bytes
Examine/Modify next location
Examine/Modify same location
Examine/Modify previous location
Exit Modify Memory command
Modify Memory Words (same subcommands as
MM)
Move a block of memory
Remove One/All Breakpoint(s)
Display all CPU registers
Set base address of I/O registers
Reset target CPU
Modify CPU Register Contents
Stop target CPU
Trace <count> instructions
S-Record Memory display
Use Hardware Breakpoints
Verify S-Records against memory contents
Set register contents
PC, SP, X, Y, A, B, D
S, XM, H, IM, N, Z, V, C