CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 18

• Manufacturer Part Number: CDB42L55
• Description: Eval Bd Ultra Low Power Stereo Codec
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L55

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L55
• Primary Attributes: 2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
• Secondary Attributes: GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1506; CDB-42L55

18
SWITCHING SPECIFICATIONS - CONTROL PORT
Inputs: Logic 0 = GND = AGND, Logic 1 = VL, SDA C
Notes:
SCL Clock Frequency
RESET Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
19. Data must be held for sufficient time to bridge the transition time, t
SDA
SCL
RESET
Stop
t irs
t buf
Parameter
Start
t hdst
t
low
Figure 7. I²C Control Port Timing
t
hdd
t high
L
= 30 pF.
(Note 19)
t sud
Repeated
t sust
Start
Symbol
t
t
t
t
t
t
t
t
t
susp
f
hdst
high
sust
t
hdd
low
sud
t
t
ack
buf
scl
irs
rc
fc
t
hdst
t r
t f
fc
, of SCL.
Min
500
250
300
4.7
4.0
4.7
4.0
4.7
4.7
0
-
-
-
Stop
t susp
Max
1000
100
300
1
-
-
-
-
-
-
-
-
-
CS42L55
DS773F1
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns