CDK5571 Cirrus Logic Inc, CDK5571 Datasheet

KIT - CDB557 W/ Capture Plus II System

CDK5571

Manufacturer Part Number
CDK5571
Description
KIT - CDB557 W/ Capture Plus II System
Manufacturer
Cirrus Logic Inc
Series
CapturePLUS™IIr
Datasheets

Specifications of CDK5571

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
100k
Data Interface
Serial
Inputs Per Adc
2 Single
Input Range
2.4 ~ 4.2 V
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS5571
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1279
CDK5571-1
Cirrus Logic, Inc.
http://www.cirrus.com
Errata: CS5571 - Silicon revision: B0
Reference CS5571 Data Sheet revision DS768PP1 dated March 2008.
Pin 12 (DITHER) Logic Level vs. Pin 13 (RST) Logic Level
Determining the Silicon Revision of the Integrated Circuit
Description
The RST pin does not initialize the device correctly if pin 12 (DITHER) is held low as pin 13 (RST) is driven
high.
Workaround
Pin 12 (DITHER) should be driven high (to VL) until after RST is driven high.
The pin can then be used as described in the data sheet for the dither function.
On the front of the integrated circuit, directly under the part number, is an alpha-numeric line. Characters 5
and 6 in this line represent the silicon revision of the chip. For example, this line indicates that the chip is a
“B0” revision chip:
This Errata is applicable only to the B0 revision of the chip.
Copyright © Cirrus Logic, Inc. 2008
FF AA B0 LL YY WW
(All Rights Reserved)
ER768B0
MAR ‘08

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