MAX9880AEVKIT+ Maxim Integrated Products, MAX9880AEVKIT+ Datasheet - Page 16

• Manufacturer Part Number: MAX9880AEVKIT+
• Description: Audio Modules & Development Tools MAX9880A KIT MAX9880A KIT
• Manufacturer: Maxim Integrated Products

Specifications of MAX9880AEVKIT+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MAX9880A Evaluation Kit
The mute and gain settings for the line outputs (LOUTL,
LOUTR) are accessed by selecting the outputs’ gain
block. The gain blocks open the Left Line Output Gain
and Right Line Output Gain windows, each of which
provides controls to mute and configure the gain of
that line output. See Figure 14 for the Left Line Output
Gain window. The windows also provide checkboxes
to enable/disable the Mode register (0x24) bits, digital
volume slew speed (DSLEW), smooth volume changes
(VSEN), and change on zero-crossings (ZDEN). Refer to
the MAX9880A IC data sheet for register details.
The line output gain windows also provide the option to
synchronize the left and right output settings. When the
Sync Right and Left checkbox is selected, only one line
output gain window should be open, as this single win-
dow configures both the left and right line output gains
The MICL and MICR microphone inputs are routed
through two gain stages, preamplifier gain and program-
mable gain amplifier, to the ADCs. These gain stages are
accessed by selecting the two gain blocks associated
with the microphone signal paths. The first gain block
opens a Microphone Pre-Amp window that is used to
Figure 14. Left Line Output Gain Window
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Microphone Input Registers
Line Output Registers
enable/disable the analog microphone circuitry and set
the preamplifier gain. The Microphone Pre-Amp win-
dows also support synchronization between the left and
right microphone settings.
The second gain blocks open the Left and Right MIC
PGA windows, which provide a slider and edit box for
configuring the programmable gain amplifiers. These
windows also include a Change on Zero Crossings
checkbox that sets/clears the zero-crossing detection bit
(ZDEN) of the Mode register (0x24).
When the left or right digital microphones are enabled,
the left analog microphone input (MICL) is not available.
Refer to the Digital Microphone Input and Microphone
Inputs sections in the MAX9880A IC data sheet for more
information.
The microphone bias register bit (MBIAS) is accessed by
selecting the MICBIAS block on the Analog Audio tab.
The MIC Bias Voltage window provides two configura-
tion options for the microphone bias voltage (1.525V and
2.2V). The microphone bias is enabled when the PALEN
or PAREN bits of registers 0x20 and 0x21, respectively,
are set.
Microphone Bias Register