CDB4391A Cirrus Logic Inc, CDB4391A Datasheet - Page 4

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CDB4391A

Manufacturer Part Number
CDB4391A
Description
Audio Modules & Development Tools Eval Bd CS4391A
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDB4391A

Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS4391
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5. INPUT/OUTPUT FOR CLOCKS AND
The evaluation board has been designed to allow
interfacing to external systems via the 10-pin head-
er, J9. This header allows the evaluation board to
accept externally generated clocks and data. The
schematic for the clock/data I/O is shown in
Figure 9. The 74HC243 transceiver functions as an
I/O buffer where HRD1 through HRD6 determine
if the transceiver operates as a transmitter or receiv-
er. A transmit function is implemented with all
jumpers, HRD1 through HDR6 in the 8414 posi-
tion. LRCK, SDATA, and SCLK from the CS8414
will be outputs on J9. The transceiver operates as a
receiver with HRD1 through HDR6 in the
EXT_CLK position. MCLK, LRCK, SDATA and
SCLK on J9 become inputs.
6. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by six
binding posts (GND, +5V, +3/+5V, VL, VCC and
VEE), see Figure 10. The +5V input supplies pow-
er to the +5 volt digital circuitry (VA+5, VD+5,
VDPC+5), while the VL input supplies power to
the Voltage Level Converters and the CS4391
VL pin. +3/+5V supplies power to the CS4391.
VCC and VEE supply power to the op-amp and can
be +/-5 to +/-12 volts.
WARNING: Refer to the CS4391 datasheet for
maximum allowable voltages levels. Operation
outside of this range can cause permanent damage
to the device.
4
DATA
7. GROUNDING AND POWER SUPPLY
The CS4391 requires careful attention to power
supply and grounding arrangements to optimize
performance. Figure 10 details the power distribu-
tion used on this board. The decoupling capacitors
are located as close to the CS4391 as possible. Ex-
tensive use of ground plane fill in the evaluation
board yields large reductions in radiated noise.
8. CONTROL PORT SOFTWARE
The CDB4391 is shipped with Windows based
software for interfacing with the CS4391 control
port via the DB25 connector, P1. The software can
be used to communicate with the CS4391 in either
SPI
CS4391 registers are write-only. Note: The
CDB4391 must be configured for control port
mode as shown in Table 4.
Further documentation for the software is available
on the distribution diskette. The documentation is
available in the plain text format file,
README.TXT.
9. DSD OPERATION
The CDB4391 supports Direct Stream Digital
(DSD) operation through the header for external
clocks and data, J9. The CS4391 must be placed
into the DSD mode and the jumpers HDR1 through
HDR6 must be placed into the external clock posi-
tions.
DECOUPLING
or I
2
C
mode; however, in SPI mode the
CDB4391
DS335DB2

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