CDK-5581 Cirrus Logic Inc, CDK-5581 Datasheet - Page 9

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CDK-5581

Manufacturer Part Number
CDK-5581
Description
Audio Modules & Development Tools KIT CDB558 w/ Capture Plus II
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDK-5581

Product
Audio Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SWITCHING CHARACTERISTICS
T
VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V = Low; Logic 1 = VD+ = High; CL = 15 pF.
DS796PP1
SCLK(i)
Serial Port Timing in SEC Mode (SMODE = VLR)
SCLK(in) Pulse Width (High)
SCLK(in) Pulse Width (Low)
CS hold time (high) after RDY falling
CS hold time (high) after SCLK rising
CS low to SDO out of Hi-Z
Data hold time after SCLK rising
Data setup time before SCLK rising
CS hold time (low) after SCLK rising
RDY rising after SCLK falling
A
MCLK
= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;
SDO
RDY
CS
15. SDO will be high impedance when CS is high. In some systems SDO may require a pull-down resistor.
Figure 3. SEC Mode - Continuous SCLK Read Timing (Not to Scale)
Parameter
t
17
t
t
MSB
16
15
t
18
t
19
(CONTINUED)
3/25/08
14:34
(Note 15)
Symbol
t
t
t
t
t
t
t
15
16
17
18
19
20
21
-
-
Min
30
30
10
10
10
10
-
-
-
LSB
t
20
Typ
10
10
10
-
-
-
-
-
-
t
21
SCLK
Max
1
-
-
-
-
-
-
-
-
CS5581
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
9

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