CRD-5378 Cirrus Logic Inc, CRD-5378 Datasheet
CRD-5378
Specifications of CRD-5378
Related parts for CRD-5378
CRD-5378 Summary of contents
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... Noise histogram analysis Data Aquisition Board (Actual Size) www.cirrus.com General Description The CRD5378 board is a compact reference design for the Cirrus Logic single-channel seismic chip set. Data sheets for the CS3302A, CS5373A, and CS5378 devic- es should be consulted when using the CRD5378 reference design ...
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... REVISION HISTORY Revision Date RD1 JAN 2007 Initial release. RD2 JAN 2008 Upgrade from CS3302 to CS3302A-ISZ/G (U19). Change (R27,R28,R29,R30) from 0ohms to 680ohms. 2 CRD5378 Changes DS639RD2 ...
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... Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. Windows, Windows XP, and Windows NT are trademarks or registered trademark of Microsoft Corporation. SPI is a trademark of Motorola, Inc. USBXpress is a registered trademark of Silicon Laboratories, Inc. DS639RD2 CRD5378 3 ...
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... Default Jumper Settings ........................................................................................ 7 1.3 Software Setup .................................................................................................................. 8 1.3.1 PC Requirements .................................................................................................. 8 1.3.2 Seismic Evaluation Software Installation .............................................................. 8 1.3.3 USBXpress® Driver Installation ............................................................................ 8 1.3.4 Launching the Seismic Evaluation Software ......................................................... 9 1.4 Self-Testing CRD5378 ..................................................................................................... 10 1.4.1 Noise Test ........................................................................................................... 10 1.4.2 Distortion Test ..................................................................................................... 11 2. HARDWARE DESCRIPTION ................................................................................................. 12 2.1 Block Diagram ................................................................................................................. 12 2.2 Analog Hardware ............................................................................................................. 13 2 ...
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... GPIO ................................................................................................................... 46 3.5.6 Customize ........................................................................................................... 47 3.5.7 External Macros .................................................................................................. 47 4. BILL OF MATERIALS ........................................................................................................... 48 5. LAYER PLOTS ...................................................................................................................... 49 6. SCHEMATICS ....................................................................................................................... 57 Figure 1. CRD5378 Block Diagram............................................................................................... 12 Figure 2. Differential Pair Routing ................................................................................................. 29 Figure 3. Quad Group Routing...................................................................................................... 29 Figure 4. Bypass Capacitor Placement......................................................................................... 30 Table 1. Amplifier Pin 13 Jumper Setting........................................................................................ 7 Table 2. System Clock Input Setting ............................................................................................... 7 Table 3 ...
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... With power off, connect the CRD5378 power inputs to the power supply outputs. J26 pin 17 = -3.3 V J26 pin 19 = +3.3 V J26 pin • Connect the USB cable between the CRD5378 USB connector and the PC USB port. • Proceed to the Software Setup section to install the evaluation software and USB driver. 6 ® ...
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... Default Jumper Settings * indicates the default 0 Ω jumper installations for CRD5378. CH1 Input Clock Resistor EXTERNAL CLOCK 1.024 MHz 2.048 MHz 4.096 MHz 32.768 MHz Table 2. System Clock Input Setting Table 4. Input SYNC Source Selection Setting Table 5. CS5378 SYNC Source Selection Setting ...
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... Silicon Laboratories (http://www.silabs.com). For convenience, the USBXpress driver files are included as part of the installation package. To install the USBXpress driver (after installing the Seismic Evaluation Software): • Connect CRD5378 to the PC through an available USB port and apply power. The PC will detect CRD5378 as an unknown USB device. 8 ® ...
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... Files\Cirrus Seismic Evaluation\Driver\”. The PC will recognize and install the USBXpress device driver. • After driver installation, cycle power to CRD5378. The PC will automatically detect it and add USBXpress device in the Windows Hardware Device Manager. An application note, AN271 - Cirrus Seismic Evaluation GUI Installation Guide, is available from the Cirrus Logic web site with step-by-step instructions on installing the USBXpress driver ...
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... Noise and distortion self-tests can be performed once hardware and software setup is complete. First, initialize the CRD5378 reference design: • Launch the evaluation software and apply power to CRD5378. • Click ‘OK’ on the About panel to get to the Setup panel. • On the Setup panel, select Open Target on the USB Port sub-panel. ...
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... After digital filter configuration is complete, click Capture on the Data Capture sub-panel. • Once the data record is collected, the Analysis panel is automatically displayed. • Select Signal FFT from the Test Select control to display the calculated noise statistics. • Verify the distortion performance (S/D) is 109 dB or better. DS639RD2 CRD5378 11 ...
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... HARDWARE DESCRIPTION 2.1 Block Diagram Major blocks of the CRD5378 reference design include: • CS3302A Hydrophone Amplifier • CS5373A ∆Σ Modulator + Test DAC • CS5378 Digital Filter + PLL • Precision Voltage Reference • Microcontroller with USB • RS-485 Transceivers • Voltage Regulators 12 Figure 1 ...
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... Other sensors for earthquake monitoring and military applications are considered as geophones for this data sheet. External signals connect to CRD5378 through a 3-pin header on the left side of the PCB. This header makes a connection to the differential INA amplifier inputs and to either a GND or GUARD signal for con- nection to the sensor cable shields, if present ...
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... For marine applications that use the CS3302A amplifier, the inherent capacitance of the piezoelectric sen- sor is combined with large resistors to create an analog high-pass RC filter to eliminate the low-frequency components of ocean noise. 14 CRD5378 Value BAV99LT1 SOT-23 2.0 A, 1.0 A, 500 mA 0.004 µ ...
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... CRD5378 defaults depending on the sensor to be used. Refer to the recommended operating bias con- ditions for the selected sensor, which are available from the sensor manufacturer. ...
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... MCLK Input vs. GUARD Output By default, CRD5378 uses the CS3302A hydrophone amplifier. The CS3302A amplifier is a very high in- put impedance device and achieves a 1/f noise performance typically buried below the low-frequency ocean noise. To minimize leakage from high impedance sensors connected to the CS3302A amplifier, pin 13 produces a GUARD signal output to actively drive a sensor cable shield with the common mode volt- age of the sensor signal ...
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... RC filters are required between the CS3301A/02A amplifier outputs and the CS5373A modulator inputs to bandwidth limit analog signals into the modulator. For the CRD5378, the CS3301A/02A amplifier outputs are connected to external 680 and a differential anti-alias RC filter is created by connecting high linearity differential capacitance ( C0G) between each half of the rough and fine signals ...
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... Voltage Reference A voltage reference on CRD5378 creates a precision voltage from the regulated analog supplies for the modulator and test DAC VREF inputs. Because the voltage reference output is generated relative to the negative analog power supply, VREF+ is near GND potential for bipolar power supplies. ...
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... Data ready output, active low Serial clock Master in / slave out serial data Master out /slave in serial data Serial chip select, active low Description Modulator clock output Modulator synchronization output Modulator delta-sigma data input Modulator over-range flag input Test DAC delta-sigma data output CRD5378 19 ...
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... Configuration - SPI Port On CRD5378, configuration of the digital filter is through the SPI port by the on-board 8051 microcontrol- ler, which receives commands from the PC evaluation software via the USB interface. Evaluation software commands can write/read digital filter registers, specify digital filter coefficients and start/stop digital filter operation ...
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... Maximum Jitter, RMS Loop Filter Architecture If no external system clock is supplied to CRD5378, the CRD5378 can select a PLL input clock from a local oscillator. Using a clock divider, the on-board oscillator produces 1.024 MHz, 2.048 MHz, 4.096 MHz and 32.768 MHz clock outputs that can be applied to the CS5378 CLK input. ...
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... The exact use of the microcontroller features is controlled by embedded firmware. C8051F320 has dedicated pins for power and the USB connection, plus 25 general purpose I/O pins that connect to the various internal resources through a programmable crossbar. Hardware connections on CRD5378 limit how the blocks can operate, so the port mapping of microcontroller resources is detailed below. 22 ...
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... Clock input for debug interface General purpose I/O Data in/out for debug interface ADC input ADC input General Purpose I/O (unused in CRD5378) CS5373A mode control CS5373A mode control CS5373A mode control General Purpose I/O (unused in CRD5378) General Purpose I/O (CS5378 RESETz) ...
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... Through the PC evaluation software, the microcontroller default firmware can be automatically flashed to the latest version without connecting an external programmer. To flash custom firmware, software tools and an inexpensive hardware programmer that connects to the C2 Debug Interface on CRD5378 is avail- able for purchase from Silicon Laboratories (DEBUGADPTR1-USB). ...
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... Transmitter Current, Half Termination (120 Ω) 2.3.3.1 CLK, SYNC Clock and synchronization telemetry signals into CRD5378 are received through RS-485 twisted pairs. These signals are required to be distributed through the external system with minimal jitter and timing skew, and so are normally driven through high-speed bus connections. ...
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... I2C Outputs, 2 wires each I2C Bypass Switch Control When CRD5378 is used in a distributed measurement network, each node must have a unique address. This address is used to transmit individual configuration commands and tag the source of returned con- version data. Address assignment can be either dynamic or static, depending how the telemetry system implemented ...
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... Analog Voltage Regulators Linear voltage regulators create the positive and negative analog power supply voltages to the analog components on CRD5378. These regulate the +3.3 V and -3.3 V power supply inputs to create the +2.5 V and -2.5 V analog power supplies. Specification Positive Analog Power Supply ...
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... Some microcontroller digital routes are also included on these layers away from the analog signal routes. CRD5378 layer solid ground plane without splits or routing. A solid ground plane provides the best return path for bypassed noise to leave the system. No separate analog ground is required since analog signals on CRD5378 are differentially routed. CRD5378 layer 3 is dedicated for power supply routing. Each power supply net includes at least 68 µ ...
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... INR+, INF+, INF-, INR- quad groups, and are routed with INF+ and INF tra- ditional differential pair and INR+ and INR- as guard traces outside the respective INF+ and INF- traces. INR+ INF+ INF- INR- DS639RD2 Figure 2. Differential Pair Routing Figure 3. Quad Group Routing CRD5378 INA- INA+ INR+ INF+ INF- INR- 29 ...
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... Each device power supply pin includes 0.1 µF bypass capacitors placed as close as possible to the pin. Each power supply net includes at least 68 µF bulk capacitance as a charge well for transient current loads. VD Bypass 30 CS3302A Device VA- bypass VA+ bypass Figure 4. Bypass Capacitor Placement CRD5378 DS639RD2 ...
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... Prints using the standard resolution of the screen. Exits the application software. Displays the Setup Panel. Displays the Analysis Panel. Displays the Control Panel. Displays the Setup Panel and starts Data Capture. Find help by topic. Find help by keywords. Displays the About Panel. CRD5378 31 ...
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... About Panel The About panel displays copyright information for the Cirrus Seismic Evaluation software. Click OK to exit this panel. Select Help 32 About from the menu bar to display this panel. CRD5378 DS639RD2 ...
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... Setup Panel The Setup panel initializes the evaluation system to perform data acquisition. It consists of the following sub-panels and controls. • USB Port • Digital Filter • Analog Front End • Test Bit Stream • Gain/Offset • Data Capture • External Macros DS639RD2 CRD5378 33 ...
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... Programs the microcontroller code on the target board using the .thx file found in the “C:\Program Files\Cirrus Seismic Evaluation” directory. This feature permits repro- gramming of the microcontroller (without using a hardware programmer) when a new version of the MCU code becomes available. 34 Description CRD5378 DS639RD2 ...
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... Sets the analog sample clock rate. The CS5373A modulator and test DAC typically run with MCLK set to 2.048 MHz. Configure Writes all information from the Setup panel to the digital filter. The data Capture but- ton becomes available once the configuration information is written to the target board. DS639RD2 Description CRD5378 35 ...
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... Sw Selects how the DAC_BUF to INA analog switches are enabled when connected to the CRD5376. This control is not applicable to the CRD5378 and is disabled. 3.3.4 Test Bit Stream The Test Bit Stream sub-panel configures test bit stream (TBS) generator parameters. The digital filter data sheet describes TBS operation and options ...
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... Enables offset correction. When enabled, output samples are offset by the value in the OFFSET register. (Output = Sample - OFFSET). ORCAL Enables offset calibration using the exponent value from the EXP[4:0] control. Results are automatically written to the OFFSET registers as they are calculated. EXP[4:0] Sets the exponential value used by offset calibration. DS639RD2 Description CRD5378 37 ...
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... Indicates how many more data captures are remaining to complete the requested number of Total Captures. A zero value means that the current data capture is the last one. Skip Samples Sets the total number of samples to be skipped prior to data collection. A maximum of 64K samples can be skipped 38 Description CRD5378 DS639RD2 ...
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... Control panel. These External Macros operate independently of the Macros sub- panel and are not affected by operations within it, except when a macro is saved to the . /macros/ subdi- rectory to replace a currently existing External Macro. Control Runs the External Macro associated with that button. DS639RD2 Description CRD5378 39 ...
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... Analysis Panel The Analysis panel is used to display the analysis results on collected data. It consists of the following controls. • Test Select • Statistics • Plot Enable • Cursor • Zoom • Refresh • Harmonics • Spot Noise • Plot Error 40 CRD5378 DS639RD2 ...
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... Statistics are calculated using the largest frequency bin as a full-scale signal reference. Noise FFT Runs an FFT on the collected data set and then plots frequency magnitude vs. fre- quency. Statistics are calculated using a simulated full-scale signal as a full-scale sig- nal reference. DS639RD2 Description CRD5378 41 ...
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... Signal to Noise plus Distortion of calculated FFT. Number of Bins covering the Nyquist frequency. Signal to Noise of calculated FFT. Signal to Peak Noise of calculated FFT. Spot Noise in dB/√Hz of calculated FFT. Spot Noise in nV/√Hz of calculated FFT. Number of Bins covering the Nyquist frequency. CRD5378 DS639RD2 ...
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... Once an error code is displayed in the numerical box, a description can be displayed by clicking the PLOT ERROR button. This causes a dialog box to display showing the error number, the error channel, and a text error message. DS639RD2 CRD5378 43 ...
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... Control Panel The Control panel is used to write and read register settings and to send commands to the digital filter. It consists of the following sub-panels and controls. • DF Registers • DF Commands • SPI1 • Macros • GPIO • Customize • External Macros 44 CRD5378 DS639RD2 ...
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... Contains the third data word written to or read from the SPI registers. Read 1 Word Initiates a 1 word SPI read transaction. Read 3 Words Initiates a 3 word SPI read transaction. Write 1 Word Initiates a 1 word SPI write transaction. Write 3 Words Initiates a 3 word SPI write transaction. DS639RD2 Description Description Description CRD5378 45 ...
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... Initiates a write to GPIO registers.The Direction, Pull Up and Data controls are read to determine the register values to be written. Read Initiates a read from GPIO registers.The Direction, Pull Up and Data controls are updated based on the register values that are read. 46 Description Description CRD5378 DS639RD2 ...
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... Control panel. These External Macros operate independently of the Macros sub- panel and are not affected by operations within it, except when a macro is saved to the . /macros/ subdi- rectory to replace a currently existing External Macro. Control Runs the External Macro associated with that button. DS639RD2 Description Description CRD5378 47 ...
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... BILL OF MATERIALS 48 CRD5378 DS639RD2 ...
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... LAYER PLOTS DS639RD2 CRD5378 49 ...
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