MAX2062EVKIT# Maxim Integrated Products, MAX2062EVKIT# Datasheet - Page 16

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MAX2062EVKIT#

Manufacturer Part Number
MAX2062EVKIT#
Description
Power Management Modules & Development Tools MAX2062 EVAL KIT MAX2062 EVAL KIT
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX2062EVKIT#

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual 50MHz to 1000MHz High-Linearity,
Serial/Parallel-Controlled Analog/Digital VGA
16
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PIN
10
11
14
15
16
17
18
19
20
21
22
23
24
26
27
29
30
31
32
34
35
37
38
39
9
D_ATT_OUT_2
A_ATT_OUT_2
A_ATT_OUT_1
AMP_OUT_2 Driver Amplifier Output (50I), Path 2. Connect a pullup inductor from AMP_OUT_2 to V
AMP_OUT_1 Driver Amplifier Output (50I), Path 1. Connect a pullup inductor from AMP_OUT_1 to V
D_ATT_IN_2 5-Bit Digital Attenuator Input (50I), Path 2. Requires a DC-blocking capacitor.
A_ATT_IN_2
V
V
A_VCTL_2
AMP_IN_2
REG_OUT
AMP_IN_1
A_VCTL_1
STA_B_2
STA_A_2
CC_AMP_2
AMPSET
CC_AMP_1
DA_SP
NAME
PD_2
PD_1
D0_2
D1_2
D2_2
D3_2
D4_2
Digital Attenuator Preprogrammed Attenuation-State Logic Input, Path 2
1dB Attenuator Logic Input, Path 2. Logic 0 = disable, logic 1 = enable.
2dB Attenuator Logic Input, Path 2. Logic 0 = disable, logic 1 = enable.
4dB Attenuator Logic Input, Path 2. Logic 0 = disable, logic 1 = enable.
8dB Attenuator Logic Input, Path 2. Logic 0 = disable, logic 1 = enable.
5-Bit Digital Attenuator Output (50I), Path 2. Requires a DC-blocking capacitor. Connect to
A_ATT_IN_2 through a 1000pF capacitor.
16dB Attenuator Logic Input, Path 2. Logic 0 = disable, logic 1 = enable.
Analog Attenuator Input (50I), Path 2. Requires a DC-blocking capacitor. Connect to
D_ATT_OUT_2 through a 1000pF capacitor.
Digital Attenuator Serial/Parallel Control Select. Set DA_SP to logic 1 to select serial control.
Set DA_SP to logic 0 to select parallel control.
Analog Attenuator Voltage Control Input, Path 2. Bypass to ground with a 150pF capacitor
if on-chip DAC is used (AA_SP = 1).
Analog Attenuator Output (50I), Path 2. Requires a DC-blocking capacitor. Connect to
AMP_IN_2 through a 1000pF capacitor.
Driver Amplifier Supply Voltage Input, Path 2. Bypass with a 10nF capacitor as close as
possible to the pin.
Driver Amplifier Input (50I), Path 2. Requires a DC-blocking capacitor. Connect to
A_ATT_OUT_2 through a 1000pF capacitor.
Power-Down, Path 2. See Table 2 for operation details.
Regulator Output. Bypass with 1FF capacitor.
Driver Amplifier Bias Setting for 3.3V Operation. Set to logic 1 for 3.3V operation on pins
V
Power-Down, Path 1. See Table 2 for operation details.
Driver Amplifier Input (50I), Path 1. Requires a DC-blocking capacitor. Connect to
A_ATT_OUT_1 through a 1000pF capacitor.
Driver Amplifier Supply Voltage Input, Path 1. Bypass with a 10nF capacitor as close as
possible to the pin.
Analog Attenuator Output (50I), Path 1. Requires a DC-blocking capacitor. Connect to
AMP_IN_1 through a 1000pF capacitor.
Analog Attenuator Voltage Control Input, Path 1. Bypass to ground with a 150pF capacitor
if on-chip DAC is used (AA_SP = 1).
CC_AMP_1
State A
Logic = 0
Logic = 1
Logic = 0
Logic = 1
and V
CC_AMP_2
State B
Logic = 0
Logic = 0
Logic = 1
Logic = 1
. Set to logic 0 for 5V operation.
Preprogrammed State 1
Preprogrammed State 2
Preprogrammed State 3
Preprogrammed State 4
Digital Attenuator
FUNCTION
Pin Description (continued)
CC_.
CC_.

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