LFXP2-17E-L-EVN Lattice, LFXP2-17E-L-EVN Datasheet - Page 2
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LFXP2-17E-L-EVN
Manufacturer Part Number
LFXP2-17E-L-EVN
Description
MCU, MPU & DSP Development Tools LatticeXP2 Eval Board Standard
Manufacturer
Lattice
Datasheet
1.LFXP2-17E-L-EVN.pdf
(36 pages)
Specifications of LFXP2-17E-L-EVN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
LatticeXP2 Standard
Lattice Semiconductor
Evaluation Board User’s Guide
Introduction
The LatticeXP2™ Standard Evaluation Board provides a convenient platform to evaluate, test and debug user
designs. The board features a LatticeXP2-17 FPGA in a 484 fpBGA package. The LatticeXP2 I/Os are connected
to a rich variety of interfaces described later in this document.
This document (including the schematics in the appendix) describes LatticeXP2 Standard Evaluation Boards
marked as Rev 000. This marking can be seen on the etching on the back of the printed circuit board, under the
Lattice Semiconductor logo.
The LatticeXP2 is a third-generation non-volatile FPGA device. It combines a Look-up Table (LUT) based FPGA
fabric with Flash Non-volatile cells in a flexiFLASH™ architecture. The flexiFLASH approach provides benefits
such as instant-on, small footprint, on chip storage with FlashBAK™ embedded block memories and Serial TAG
memory and design security. The LatticeXP2 also supports live updates with TransFR™, 128-bit AES Encryption
and Dual-Boot technologies. The LatticeXP2 devices include LUT-based logic, distributed and embedded memory,
Phase Locked Loops (PLLs), pre-engineered source synchronous I/O and enhanced sysDSP™ blocks.
For a full description of the LatticeXP2 FPGA, see the Lattice website for data sheets, technical notes, technology
summaries and more: www.latticesemi.com/products/xp2.
Some common uses for the LatticeXP2 Standard Evaluation Board include:
• A Single Board Computer system
• An analog-to-digital, and digital-to-analog mixed signal source/sink
• A platform for evaluating the Input/Output (I/O) characteristics of the FPGA
Features
Key features of the LatticeXP2 Standard Evaluation Board include:
• LatticeXP2 FPGA 484-pin fine pitch Ball Grid Array device (LFXP2-17E-6F484C)
• Single printed circuit board solution
• Eight LEDs for visual feedback
• Seven-segment LED
• Eight-position switch input
• General purpose push buttons
• SRAM memory for microprocessor applications
• Compact Flash connector for adding peripherals
• RS232 DB9 Female connector
• LCD connector with backlight and contrast controls
• IEEE 1149.1 JTAG programming/boundary-scan interface
®
• Built-in USB download for use with ispVM
software
• Built-in power supply operating from a 5V DC input
• Power supply manager for testing supply sequencing
• Selectable voltage for bank 6 I/O
• Replaceable oscillator for reference clocks
• SMA connectors to LatticeXP2 clock input/general purpose I/O pins
• 100mil center-center test point grid
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