LFXP2-17E-L-EV Lattice, LFXP2-17E-L-EV Datasheet - Page 6

MCU, MPU & DSP Development Tools LatticeXP2 EVAL BRD STD

LFXP2-17E-L-EV

Manufacturer Part Number
LFXP2-17E-L-EV
Description
MCU, MPU & DSP Development Tools LatticeXP2 EVAL BRD STD
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-17E-L-EV

Processor To Be Evaluated
LatticeXP2-17 FPGA
Interface Type
RS-232, USB
Silicon Manufacturer
Lattice
Core Architecture
FlexiFLASH
Silicon Core Number
LFXP2-17E-4F484C
Silicon Family Name
LatticeXP2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Note: The board must be un-powered when connecting, disconnecting, or reconnecting the ispDOWNLOAD®
Cable or USB cable. Always connect an ispDOWNLOAD Cable’s GND pin (black wire), before connecting any
other JTAG pins. Failure to follow these procedures can in result in damage to the LatticeXP2 FPGA and render the
board inoperable.
LatticeXP2 JTAG Access
The default configuration of the LatticeXP2 Standard Evaluation Board connects the built-in JTAG cable/J34 to only
access the LatticeXP2 FPGA. The serial output from the USB cable/J34 is routed directly to the serial input of the
LatticeXP2 FPGA. The serial output from the LatticeXP2 is routed to J29. A jumper on J29 directs the serial output
of the LatticeXP2 back to the USB cable/J34. This is the factory default configuration and is expected to be the pri-
mary JTAG mode for most users.
The board can also be configured to access the LatticeXP2 FPGA, and a chained evaluation board. A 1x10 cable
(not supplied) can be connected locally to J33 and the opposite end of the cable can be attached to another system
that has a JTAG chain.
Chaining the LatticeXP2 Standard Evaluation Board with another board is accomplished by changing the routing of
the TDI/TDO/TMS/TCK I/Os. Jumpers J29, J30, J31, and J32 determine how the TDI/TDO chain and TMS pins
behave.
Table 3. LatticeXP2 Single/Multi-Board Configuration
J31, when shorted, adds a pull-down resistor to the TCK signal. Only one chained evaluation board should have a
pull-down on TCK.
Figure 2. Single/Multi-Board Jumpers
Jumper
Block
J29
J30
J31
J32
1-2
Open
1-2 (1K pull-down resistor on TCK)
Open
LatticeXP2 Only
LatticeXP2 Board Only
LatticeXP2 + Eval
6
J28
J29
J30
J31
J32
2-3
1-2
1-2 (off-board chain does not pull TCK to GND).
Open (off-board chain pulls TCK to GND).
1-2
LatticeXP2 Board Plus
Off-board JTAG Chain
Evaluation Board User’s Guide
JTAG
Offboard
JTAG Chain
J34
J33
LatticeXP2 Standard

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