EA-EDU-010 Embedded Artists, EA-EDU-010 Datasheet - Page 2

MCU, MPU & DSP Development Tools LPC2138 EDUCATION BRD

EA-EDU-010

Manufacturer Part Number
EA-EDU-010
Description
MCU, MPU & DSP Development Tools LPC2138 EDUCATION BRD
Manufacturer
Embedded Artists
Datasheets

Specifications of EA-EDU-010

Processor To Be Evaluated
LPC2138
Data Bus Width
16 bit, 32 bit
Interface Type
I2C, SPI, UART
Core
ARM7TDMI-S
Dimensions
127 mm x 120 mm
Maximum Operating Temperature
+ 85 C
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
3. Ordering information
LPC2131_32_34_36_38
Product data sheet
Table 1.
Type number
LPC2131FBD64
LPC2131FBD64/01 LQFP64
LPC2132FBD64
LPC2132FBD64/01 LQFP64
LPC2132FHN64
LPC2132FHN64/01 HVQFN64 plastic thermal enhanced very thin quad flat
LPC2134FBD64
LPC2134FBD64/01 LQFP64
One (LPC2131/32) or two (LPC2134/36/38) 8-channel 10-bit ADCs provide a total of
up to 16 analog inputs, with conversion times as low as 2.44 μs per channel.
Single 10-bit DAC provides variable analog output (LPC2132/34/36/38).
Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.
Low power Real-time clock with independent power and dedicated 32 kHz clock input.
Multiple serial interfaces including two UARTs (16C550), two Fast I
SPI and SSP with buffering and variable data length capabilities.
Vectored interrupt controller with configurable priorities and vector addresses.
Up to forty-seven 5 V tolerant general purpose I/O pins in tiny LQFP64 or HVQFN
package.
Up to nine edge or level sensitive external interrupt pins available.
60 MHz maximum CPU clock available from programmable on-chip PLL with settling
time of 100 μs.
On-chip integrated oscillator operates with external crystal in range of 1 MHz to
30 MHz and with external oscillator up to 50 MHz.
Power saving modes include Idle and Power-down.
Individual enable/disable of peripheral functions as well as peripheral clock scaling
down for additional power optimization.
Processor wake-up from Power-down mode via external interrupt or BOD.
Single power supply chip with POR and BOD circuits:
CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O
pads.
Ordering information
All information provided in this document is subject to legal disclaimers.
Package
Name
LQFP64
LQFP64
HVQFN64 plastic thermal enhanced very thin quad flat
LQFP64
Rev. 5 — 2 February 2011
Description
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
package; no leads; 64 terminals; body
9 × 9 × 0.85 mm
package; no leads; 64 terminals; body
9 × 9 × 0.85 mm
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
plastic low profile quad flat package; 64 leads;
body 10 × 10 × 1.4 mm
LPC2131/32/34/36/38
Single-chip 16/32-bit microcontrollers
2
C-bus (400 kbit/s),
© NXP B.V. 2011. All rights reserved.
Version
SOT314-2
SOT314-2
SOT314-2
SOT314-2
SOT804-2
SOT804-2
SOT314-2
SOT314-2
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