EVB111-ISA SMSC, EVB111-ISA Datasheet - Page 2

• Manufacturer Part Number: EVB111-ISA
• Description: MCU, MPU & DSP Development Tools Evaluation Board
• Manufacturer: SMSC

Specifications of EVB111-ISA

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.0 (01-28-09)
2.3
2.3.1
2.3.2
2.3.3
2.3.4
Measurement Procedure
LAN91C111 Initialization Steps
Procedure for Setting Idle State without Cable Connected
Procedure for Setting EPH (MAC) Power Down Mode:
Procedure for Setting PHY Power Down Mode:
Upon power-up, LAN91C111 defaults in a not complete working status. The PHY portion is in isolate
mode as the MII bus disabled. The transmitter and receiver of the EPH block of the MAC portion are
both not enabled. In order to set LAN91C111 in normal working status and establishing a link, all
blocks of the device must be properly powered on and initialized.
A power up Auto-Negotiation enable initialization sequence is provided below for reference:
1. Power up the device; Wait for 50ms.
2. Reset the device by setting and clearing the SOFT_RST bit in the Receive Control Register (MAC
3. Set the ANEG bit to 1 in the Receive/PHY Control Register (MAC Register, Bank 0, Offset A) to
4. Reset PHY by set the RST bit of PHY Register 0 (0x8000); wait for 50ms.
5. Turn off the isolation mode of the internal PHY by writing x1000 to the PHY Register 0 – Control
6. The PHY needs at least 1.5 second to complete the Auto_Negotiation process.
7. Read the ANEG_ACK bit and the LINK bit in the PHY Register 1 – Status Register to check
Once the initialization completed, the link should be established between the local device and the
remote partner node connected.
This idle state defined in this document is a test condition of LAN91C111 after power up initialization,
and the link established, then disconnecting the connecting cable for the current measurement.
1. Disable Transmitter – Clear the TXENA bit of the Transmit Control Register;
2. Remove and release all TX completion packet numbers on the TX completion FIFO;
3. Disable Receiver – Clear the RXEN bit of the Receive Control Register;
4. Remove and Release all Received packets;
5. Clear the Interrupt Status Register;
6. Write and set “0” to the “EPH Power EN” Bit located in the Configuration Register (MAC Register
1. Disable Transmitter – Clear the TXENA bit of the Transmit Control Register;
2. Remove and release all TX completion packet numbers on the TX completion FIFO;
3. Disable Receiver – Clear the RXEN bit of the Receive Control Register;
4. Remove and Release all Received packets;
5. Clear the Interrupt Status Register;
6. Set PDN bit in PHY MI Register 0 to “1” to set internal PHY entered in power down mode.
Register, Bank 0 Offset 4); Write 0x8000, then write 0x0000; Wait for 50ms.
enable the Auto_Negotiation mode.
Register. The PHY will start the Auto_Negotiation Process.
whether the Auto_Negotiation Process is completed and Link is established.
Bank 1 Offset 0) to set EPH (MAC) in power down mode.
APPLICATION NOTE
Current Measurements and Measurement Procedures for the LAN91C111 and LAN91C111 Evaluation Board
2
SMSC AN 11.2