SI300-FS Silicon Laboratories Inc, SI300-FS Datasheet - Page 31

MCU, MPU & DSP Development Tools INT MIC/SPK/HDST LEAD-FREE

SI300-FS

Manufacturer Part Number
SI300-FS
Description
MCU, MPU & DSP Development Tools INT MIC/SPK/HDST LEAD-FREE
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI300-FS

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7. 16-Pin SOIC Land Pattern
Figure illustrates the recommended land pattern for the Si3000 16-pin SOIC. Table 16 lists the values for the
dimensions shown in the illustration.
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ASME Y14.5M-1994.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a
5. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm
6. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release.
7. The stencil thickness should be 0.125 mm (5 mils).
8. The ratio of stencil aperture to land pad size should be 1:1.
9. A No-Clean, Type-3 solder paste is recommended.
10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
Fabrication Allowance of 0.05 mm.
minimum, all the way around the pad.
C1
X1
Y1
E
Table 16. 16-Pin MSOP Land Pattern Dimensions
Figure 20. 16-Pin SOIC Land Pattern Diagram
 
Pad Column Spacing
Pad Row Pitch
Rev. 1.4
Pad Length
Pad Width
Feature
Si3000
5.40
1.27
0.60
1.55
mm
31

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