RK-900-FDTC Radiotronix, RK-900-FDTC Datasheet - Page 6

• Manufacturer Part Number: RK-900-FDTC
• Description: RF Modules & Development Tools Rapid Developmnt Kit
• Manufacturer: Radiotronix

Specifications of RK-900-FDTC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Configuration
The transceiver is configured by programming four
registers via a three-wire serial interface comprised of
CLK (pin 10), DAT (pin 11), and LE (pin 12).
Fig. 4: SERIAL PROGRAMMING WAVEFORMS
When LE is high, bits are shifted in from DAT on each
rising edge of CLK. The most significant bit is shifted
in first.
Bits 0 and 1 determine the register being programmed.
Table 1: REGISTER ADDRESS BITS
Each register is 22 bits. Therefore, 24 bits must be
shifted into the DAT pin to successfully program a
register,
When LE transitions high, the incoming bits are stored
in a shift register until LE transitions low. On the falling
edge of the transition, the contents of the shift register
are transfered to the appropriate control register.
EWM-900-FDTC
B
t i
0
0
1
1
0
6
B
t i
0
0
1
1
1
R
R
R
T
M
e
e
X
X
o
i g
e f
d
V
V
e
t s
e r
C
C
C
r e
n
O
O
o
e c
C
c
n
o
o
r t
f
n
e r
n
l o
r t
r t
q
l o
l o
u
e
n
y c
c
o
n
r t
l o
Rev Date 7/25/01
Reference Frequency Control Register
The value programmed into this register determines
the reference frequency for the transceiver.
For normal operation, the reference frequency is set
to 50kHz. The programming word is:
binary: 00000000 01000011 11000000
The two zero’s on the end are the register select bits
and are set for the reference frequency control register.
The reference frequency should be fixed at 50kHz and
should not be changed.
Receive VCO Control Register
The receive VCO control register determines the
operating channel of the receiver. The receive
frequency is determined by the values of the A, F, and
M counters. The trim bits are used to adjust the tuning
range of the receive VCO. The trim value is determined
at the factory and is provided with each module. It is
clearly marked on the top of the module in indelible
Table 2: REFERENCE FREQUENCY
A
M
0
7
C
C
o
o
t n u
t n u
0
0 [
6
0 [
] 2 :
] 5 :
r T
m i
5
0 [
F
] 1 :
i B
4
R
p t
g e
s o
s i
M
r e t
i t i
3
C
n o
o
0 [
t n u
] 2 :
2
6 [
] 9 :
0
A
Preliminary
C
1
o
t n u
1
3 [
0
] 5 :
1
0
2
B
y
e t