MRF89XAM9A-I/RM Microchip Technology, MRF89XAM9A-I/RM Datasheet - Page 64

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MRF89XAM9A-I/RM

Manufacturer Part Number
MRF89XAM9A-I/RM
Description
WiFi / 802.11 Modules & Development Tools 915MHz Sub-GHz Transceiver Mod
Manufacturer
Microchip Technology
Datasheet

Specifications of MRF89XAM9A-I/RM

Modulation Type
FSK, OOK
Data Rate Max
200Kbps
Sensitivity
-113dBm
Supply Voltage Range
2.1V To 3.6V
Module Interface
SPI, 4-Wire
Supply Current
25mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF89XAM9A-I/RM
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MRF89XAM9A-I/RM
Manufacturer:
MICROCHI
Quantity:
20 000
3.3.6
3.3.6.1
In OOK mode, the PA ramp times can be accurately
controlled
(PACONREG<4:3>). These bits directly control the slew
rate of the PARS pin.
TABLE 3-2:
FIGURE 3-4:
DS70622B-page 64
MRF89XA
PARC<1:0>
00
01
10
11
POWER AMPLIFIER
Rise and Fall Time Control
through
POWER AMPLIFIER
RISE/FALL TIMES
PA TIMING CONTROL
8.5 µs
t
15 µs
23 µs
PARS
3 µs
the
PARS
PA Output
Power
DATA
[V]
PARC<1:0>
60 dB
95%
(rise / fall)
20 / 10 µs
2.5 / 2 µs
10 / 6 µs
5 / 3 µs
t
PAOUT
t PARS
t PA_OUT
Preliminary
bits
3.3.7
The registers associated with Transmit mode are:
• GCONREG (Register 2-1)
• DMODREG (Register 2-2)
• FDEVREG (Register 2-3)
• BRSREG (Register 2-4)
• R1CREG (Register 2-7)
• P1CREG (Register 2-8)
• S1CREG (Register 2-9)
• R2CREG (Register 2-10)
• P2CREG (Register 2-11)
• S2CREG (Register 2-12)
• PACREG (Register 2-13)
• FTXRXIREG (Register 2-14)
• FTPRIREG (Register 2-15)
During the Transmit mode of MRF89XA, the Shift reg-
ister takes bytes from the FIFO and outputs them seri-
ally (MSb first) at the programmed bit rate to the
modulator. When the transmitter is enabled, it starts
sending out data from the Shift register with respect to
the set bit rate. After power-up and with the Transmit
registers enabled, the transmitter preloads the FIFO
with preambles before sending the actual data based
on the mode of operation. Figure 3-4 illustrates the PA
Control Timing.
t PARS
t PA_OUT
60 dB
95%
TRANSMIT MODE REGISTERS
© 2010 Microchip Technology Inc.

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