GR881 GREENWICH INSTRUMENTS, GR881 Datasheet - Page 2

• Manufacturer Part Number: GR881
• Description: IC, NVRAM, 64KBIT, 100NS, DIP-28
• Manufacturer: GREENWICH INSTRUMENTS

Specifications of GR881

• Memory Size: 64Kbit
• Memory Configuration: 8K X 8
• Access Time: 100ns
• Supply Voltage Range: 4.75V To 5.5V
• Memory Case Style: DIP
• No. Of Pins: 28
• Operating Temperature Range: -20°C To +70°C
• Rohs Compliant: Yes
• Nvram Features: Internal Battery

Address
D
Address
Address
D
D
D
D
OUT
Greenwich Instruments Ltd., are continually developing their products and reserve the right
to alter specifications without prior notice. Standard Terms and Conditions of Sale apply.
CE
OE
CE
WE
OUT
IN
CE
WE
OUT
IN
<
NON-VOLATILE RAM
> <
GR881 (8K x 8)
0.5
<
<
<
<
<
t
<
t
AS
AS
37
WRITE CYCLE 1
READ CYCLE
>
>
<
<
t
t
CLZ
t
t
>
WHZ
WHZ
WRITE CYCLE 2
ACC
<
t
ACS
t
>
OE
<
t
>
>
>
OLZ
<
<
t
RC
>
>
>
<
t
t
t
WC
t
<
DIMENSIONS (mm)
2.5
WC
<
WP
WP
<
<
t
t
DS
DS
>
>
>
<
>
>
http://www.greenwichinst.co.uk
<
<
<
<
<
t
t
t
t
OH
<
DH
OW
DH
t
t
t
OHZ
CHZ
t
WR
WR
>
>
>
>
>
7.3
4
>
<
>
>
>
>
>
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes
1. WE must be high during address transitions.
2. A Write occurs during the overlap of active CE
3. CE = CE1 and CE2
4. WE is high for a read cycle.
<
Symbol
RC
ACC
ACS
OE
CLZ
OLZ
OH
CHZ
OHZ
Symbol
WC
WP
AS
WR
WHZ
OW
DS
DH
<
and a low WE.
15.24
18
REPLACES
Parameter
Read cycle time
Access time
CE to output valid
OE to output valid
CE to output active
OE to output active
Output hold time
CE to output disable
OE to output disable
Parameter
Write cycle time
Write pulse width
Address setup time
Write recovery time
WR to output disable
Output active from WR
Data setup time
Data HOLD TIME
TIMING (nS-nano seconds)
>
>
<
>
0.38
Write Cycle
Read Cycle
.......... 6264., 5565., etc.
ISSUE 4 OCT 2005
Min
100
100
10
5
10
Min
60
10
40
100nS
0
0
0
100nS
2000/95/EC
Max
100
100
40
30
20
Max
30
Address
D
Address
Address
D
D
D
D
OUT
Greenwich Instruments Ltd., are continually developing their products and reserve the right
to alter specifications without prior notice. Standard Terms and Conditions of Sale apply.
CE
OE
CE
WE
OUT
IN
CE
WE
OUT
IN
<
NON-VOLATILE RAM
> <
GR881 (8K x 8)
<
<
0.5
<
<
<
t
<
t
AS
AS
37
WRITE CYCLE 1
READ CYCLE
>
>
<
<
t
t
>
CLZ
t
t
WHZ
WHZ
WRITE CYCLE 2
<
ACC
t
ACS
>
t
OE
<
t
>
>
>
OLZ
<
<
t
RC
>
>
>
t
<
t
WC
t
WC
t
<
DIMENSIONS (mm)
2.5
<
WP
WP
<
<
t
t
DS
DS
>
>
>
<
>
>
http://www.greenwichinst.co.uk
<
<
<
<
<
t
t
t
t
OH
<
DH
OW
DH
t
t
t
OHZ
CHZ
t
WR
WR
>
>
>
>
>
7.3
4
>
>
<
>
>
>
>
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes
1. WE must be high during address transitions.
2. A Write occurs during the overlap of active CE
3. CE = CE1 and CE2
4. WE is high for a read cycle.
<
Symbol
RC
ACC
ACS
OE
CLZ
OLZ
OH
CHZ
OHZ
Symbol
WC
WP
AS
WR
WHZ
OW
DS
DH
<
and a low WE.
15.24
18
REPLACES
TIMING (nS-nano seconds)
Parameter
Read cycle time
Access time
CE to output valid
OE to output valid
CE to output active
OE to output active
Output hold time
CE to output disable
OE to output disable
Parameter
Write cycle time
Write pulse width
Address setup time
Write recovery time
WR to output disable
Output active from WR
Data setup time
Data HOLD TIME
>
>
<
>
0.38
Write Cycle
Read Cycle
.......... 6264., 5565., etc.
ISSUE 4 OCT 2005
Min
100
100
10
5
10
Min
60
10
40
0
100nS
0
0
100nS
2000/95/EC
Max
100
100
40
30
20
Max
30