CY7C1051DV33-10ZSXI Cypress Semiconductor Corp, CY7C1051DV33-10ZSXI Datasheet
CY7C1051DV33-10ZSXI
Specifications of CY7C1051DV33-10ZSXI
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CY7C1051DV33-10ZSXI Summary of contents
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... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH write operation (CE LOW, and WE LOW progress. The CY7C1051DV33 is available in a 44-pin TSOP II package with center power and ground (revolutionary) pinout and a 48-ball FBGA package. INPUT BUFFER 512 K × ...
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... Data Retention Waveform................................................ 5 AC Switching Characteristics ......................................... 6 Switching Waveforms ...................................................... 7 Read Cycle No. 1 ........................................................ 7 Read Cycle No. 2 (OE Controlled) .............................. 7 Write Cycle No. 1 (CE Controlled)............................... 8 Document #: 001-00063 Rev. *G CY7C1051DV33 Write Cycle No. 2 (BLE or BHE Controlled) ................ 8 Write Cycle No. 3 (WE Controlled, OE LOW) ............. 9 Truth Table ........................................................................ 9 Ordering Information...................................................... 10 Ordering Code Definitions ......................................... 10 Package Diagrams.......................................................... 11 Acronyms ...
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... Document #: 001-00063 Rev BLE I BHE I/O I I I/O I I/O I I/O I BHE BLE 6 I I I I/O I I/O I I/O I I/O I –10 (Industrial) –12 (Industrial) –15 (Automotive- 110 100 CY7C1051DV33 [ [3] [4] Unit 15 ns 120 Page [+] Feedback ...
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... IN Test Conditions T = 25 MHz 3 Test Conditions Still air, soldered × 4.5 inch, four-layer printed circuit board CY7C1051DV33 Ambient V Speed CC Temperature –40 C to +85 C 3.3 V 0 –40 C to +85 C 3.3 V 0 –40 C to +125 C 3.3 V 0.3 V ...
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... Conditions 2 > V – 0 > V – 0 < 0 DATA RETENTION MODE > (min) > 50 s or stable at V (min) > 50 CY7C1051DV33 Figure 3 (a). High-Z characteristics are tested for ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns (b) Min Max Unit 2.0 – V – – – 3.0 V ...
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... CC “AC Test Loads and Waveforms” is less than less than less than t LZCE HZOE LZOE HZBE and t HZWE CY7C1051DV33 [1] –15 (Auto-E) Unit Max Min Max s – 100 – – 15 – – ...
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... BHE, BLE, or both = HIGH for Read cycle. 17. Address valid before or coincident with CE transition LOW. Document #: 001-00063 Rev. *G [15, 16] Figure 4. Read Cycle No OHA [16, 17] Figure 5. Read Cycle No DATA VALID 50 CY7C1051DV33 DATA VALID t HZOE t HZCE t HZBE HIGH IMPEDANCE ICC CC 50% I ISB SB Page [+] Feedback ...
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... WE CE DATA I/O Notes 18. Data I/O is high-impedance if OE, or BHE, BLE, or both = V 19 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 001-00063 Rev. *G [18, 19] Figure 6. Write Cycle No SCE PWE Figure 7. Write Cycle No PWE t SCE CY7C1051DV33 Page [+] Feedback ...
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... Power Down Data Out Read All Bits High-Z Read Lower Bits Only Data Out Read Upper Bits Only Data In Write All Bits High-Z Write Lower Bits Only Data In Write Upper Bits Only High-Z Selected, Outputs Disabled CY7C1051DV33 LZWE Mode Power Standby ( Active ( ...
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... To find the office closest to you, visit us at http://www.cypress.com/go/datasheet/offices. Speed Ordering Code (ns) 10 CY7C1051DV33-10BAXI CY7C1051DV33-10ZSXI 12 CY7C1051DV33-12BAXI CY7C1051DV33-12ZSXI 15 CY7C1051DV33-15ZSXE Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions CY ...
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... Package Diagrams Figure 9. 48-Ball FBGA ( 1.2 mm), 51-85193 TOP VIEW A1 CORNER 6.00±0.10 B SEATING PLANE C Note 20. Automotive product information is preliminary. Document #: 001-00063 Rev. *G CY7C1051DV33 BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 A 0.75 3.75 6.00±0.10 B 0.15(4X) REFERENCE JEDEC MO-207 51-85193-*B Page ...
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... DIMENSION IN MM (INCH) MAX MIN. Document #: 001-00063 Rev. *G PIN 1 I. BASE PLANE 0.10 (.004) 0°-5° SEATING PLANE CY7C1051DV33 EJECTOR MARK (OPTIONAL) CAN BE LOCATED BOTTOM VIEW ANYWHERE IN THE BOTTOM PKG 10.262 (0.404) 10.058 (0.396) ...
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... I/O Input/output OE output enable SRAM Static random access memory SOJ Small Outline J-Lead TSOP Thin Small Outline Package VFBGA Very Fine-Pitch Ball Grid Array Document #: 001-00063 Rev. *G CY7C1051DV33 Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA microamperes mA milliamperes ...
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... Document History Page Document Title: CY7C1051DV33, 8-Mbit (512 K × 16) Static RAM Document Number: 001-00063 Orig. of REV. ECN NO. Issue Date Change ** 342195 See ECN *A 380574 See ECN *B 485796 See ECN *C 866000 See ECN *D 1513285 See ECN VKN/AESA Converted from preliminary to final *E 2911009 ...
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... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 001-00063 Rev. *G All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised December 16, 2010 CY7C1051DV33 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...