XC3S200-4FT256C Xilinx Inc, XC3S200-4FT256C Datasheet - Page 146
![no-image](/images/no-image-200.jpg)
XC3S200-4FT256C
Manufacturer Part Number
XC3S200-4FT256C
Description
FLASH PROMS
Manufacturer
Xilinx Inc
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S200-4FT256C
Package
256FTBGA
Family Name
Spartan®-3
Device Logic Units
4320
Device System Gates
200000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
173
Ram Bits
221184
Case
BGA
Dc
05+
Available stocks
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Part Number:
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Manufacturer:
XILINX/赛灵思
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Spartan-3 FPGA Family: Pinout Descriptions
FT256 Footprint
146
113
16
7
0
M
A
B
C
D
E
G
H
K
N
P
R
F
J
L
T
I/O: Unrestricted, general-purpose user I/O
DCI: User I/O or reference resistor input for
bank
CONFIG: Dedicated configuration pins
N.C.: No unconnected pins in this package
VCCAUX
VCCAUX
VREF_7
VREF_6
VREF_6
L01N_6
L20P_6
L01P_6
L01P_7
L01N_7
L20N_7
L40N_7
L40P_6
L17P_6
VRN_7
L17N_7
VRN_6
VRP_7
L40P_7
VRP_6
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
L24P_6
L22P_6
L20N_6
L17N_6
L16N_6
L22N_7
L16N_7
L17P_7
L20P_7
L40N_6
GND
GND
GND
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M1
2
PROG_B
RDWR_B
VREF_6
L22N_6
VREF_0
VREF_7
VREF_7
L39P_6
L19P_6
L16P_6
L19P_7
L19N_7
L22P_7
L39N_7
L24N_6
L01P_5
L01N_5
L16P_7
L24N_7
CS_B
M0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
3
HSWAP_
L01P_0
VCCINT
L39N_6
L23P_6
L21P_6
L19N_6
VCCINT
VRN_0
L01N_0
L21P_7
L21N_7
L39P_7
L10P_5
L10N_5
VRP_0
VRN_5
VRP_5
L24P_7
I/O
I/O
EN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M2
I/O
I/O
4
VCCO_7 VCCO_7
VCCO_6 VCCO_6
VREF_0
VREF_5
VCCINT
VCCINT
L23N_6
L21N_6
L27P_5
L23N_7
L27N_5
L23P_7
L25P_0
L25N_0
Figure 46: FT256 Package Footprint (top view)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
5
Bank 0
Bank 5
VCCAUX
VCCAUX
VCCO_7
VCCO_6
VREF_5
L28N_5
L29N_5
L28P_5
L29P_5
L28N_0
L27N_0
12
32
L28P_0
L27P_0
8
4
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
D6
6
DUAL: Configuration pin, then possible
user I/O
GCLK: User I/O or global clock buffer input
JTAG: Dedicated JTAG port pins
GND: Ground
VCCO_0 VCCO_0 VCCO_1 VCCO_1
VCCO_5 VCCO_5 VCCO_4 VCCO_4
L30P_5
L30N_5
L31P_5
L31N_5
L30P_0
L30N_0
L29P_0
L29N_0
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D5
D4
7
www.xilinx.com
VCCO_0 VCCO_1
VCCO_5 VCCO_4
VREF_0
VREF_5
L31P_0
L32P_0
L32N_0
L31N_0
L32P_5
L32N_5
GCLK6
GCLK7
GCLK2
GCLK3
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
IO
8
L31N_4
L31P_4
L32N_1
DOUT
L32N_4
GCLK5
L32P_1
GCLK4
BUSY
GCLK1
L32P_4
GCLK0
INIT _B
GND
GND
GND
I/O
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
9
VREF_4
VREF_1
L30N_4
L30P_4
L31N_1
L30N_1
L31P_1
L30P_1
L29N_4
L29P_4
GND
GND
GND
GND
10
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D2
D3
IO
VCCAUX
VCCAUX
VCCO_2
VCCO_2 VCCO_2
VCCO_3 VCCO_3
VCCO_3
L27N_4
L27P_4
L29N_1
L29P_1
L28N_1
L28P_1
L28N_4
L28P_4
GND
GND
I/O
I/O
I/O
I/O
I/O
DIN
I/O
I/O
I/O
11
D0
D1
Bank 1
Bank 4
24
24
8
8
VREF_1
VREF_3
VREF_4
VCCINT
VCCINT
VREF_2
L27N_1
L21N_2
L23N_2
L23N_3
L25N_4
L27P_1
L25P_4
L23P_3
12
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IO
IO
VREF: User I/O or input voltage reference for
bank
VCCO: Output voltage supply for bank
VCCINT: Internal core voltage supply
(+1.2V)
VCCAUX: Auxiliary voltage supply
(+2.5V)
VREF_4
VCCINT
VCCINT
VREF_1
L10P_1
L19N_2
L21P_2
L23P_2
L39N_2
L39P_3
L24P_3
L21N_3
L21P_3
L01N_4
L01P_4
VRN_4
L10N_1
VRP_4
DS099-4 (v2.5) December 4, 2009
TMS
IO
13
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
L01N_1
L22N_2
L24N_2
L39N_3
L24N_3
L19N_3
L16P_2
L19P_2
L39P_2
L22P_3
L19P_3
L16P_3
VRP_1
L01P_1
VRN_1
DONE
TCK
14
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Product Specification
VREF_3
L16N_2
L17N_2
L20N_2
L22P_2
L24P_2
L40N_2
L22N_3
L20P_3
L17P_3
L16N_3
CCLK
TDO
GND
GND
GND
15
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DS099-4_10_030503
VCCAUX
VCCAUX
VREF_2
VREF_3
L40P_2
L40N_3
L01N_3
L01P_3
L01N_2
L01P_2
VREF_2
L20P_2
L40P_3
L20N_3
L17N_3
VRP_3
VRN_3
L17P_2
VRP_2
VRN_2
GND
GND
16
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
3
2
3
R
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