11LC160-E/P Microchip Technology, 11LC160-E/P Datasheet - Page 11

• Manufacturer Part Number: 11LC160-E/P
• Description: 16K, 2048 X 8 2.5V SERIAL EE, EXT 8 PDIP .300in TUBE
• Manufacturer: Microchip Technology

Specifications of 11LC160-E/P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 16K (2K x 8)
• Speed: 100kHz
• Interface: UNI/O™ (Single Wire)
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2
The internal address counter featured on the 11XX
maintains the address of the last memory array loca-
tion accessed. The
ter to read data back beginning from this current
location. Consequently, no word address is provided
upon issuing this command.
Note that, except for the initial word address, the
READ
the ability to continue requesting data through the use
of MAKs in order to sequentially read from the array.
As with the
terminated by transmitting a NoMAK.
Table 4-2 lists the events upon which the internal
address counter is modified.
FIGURE 4-2:
 2010 Microchip Technology Inc.
SCIO
SCIO
SCIO
Note 1: For the 11XXXX1, this bit must be a ‘1’.
and
Current Address Read (CRRD)
Instruction
CRRD
READ
0
Standby Pulse
7 6 5 4
0
instructions are identical, including
instruction, the
CRRD
0
Command
CRRD COMMAND SEQUENCE
Data Byte n
0
instruction allows the mas-
0
3 2 1 0
1
1
CRRD
0
instruction is
0
7 6 5 4
Start Header
1
Preliminary
Data Byte 1
0
1
0
3 2 1 0
1
TABLE 4-2:
—
READ
WRITE
READ
WRITE
CRRD
Command
0
Note: If, following each data byte in a
Note: During a Write command, once the last
11AAXXX/11LCXXX
1
,
or
, or
WRITE
MAK nor a NoMAK edge is received
(i.e., if a standby pulse occurs instead),
the internal address counter will not be
incremented.
data byte for a page has been loaded,
the internal Address Pointer will rollover
to the beginning of the selected page.
Power-on Reset Counter is undefined
MAK edge fol-
lowing each
Address byte
MAK/NoMAK
edge following
each data byte
1
7 6 5 4
, or
0
INTERNAL ADDRESS
COUNTER
Device Address
Event
Data Byte 2
1
CRRD
0
0
3 2 1 0
instruction, neither a
0
Counter is updated
with newly received
value
Counter is incre-
mented by 1
0
DS22067H-page 11
0
(1)
Action
READ
,