AD5336BRU Analog Devices Inc, AD5336BRU Datasheet - Page 17
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AD5336BRU
Manufacturer Part Number
AD5336BRU
Description
D/A Converter (D-A) IC
Manufacturer
Analog Devices Inc
Datasheet
1.AD5336BRUZ.pdf
(20 pages)
Specifications of AD5336BRU
Digital Ic Case Style
TSSOP
No. Of Pins
28
Operating Temperature Range
-40°C To +105°C
Peak Reflow Compatible (260 C)
No
No. Of Bits
10 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Settling Time
7µs
Number Of Bits
10
Data Interface
Parallel
Number Of Converters
4
Voltage Supply Source
Single Supply
Power Dissipation (max)
4.5mW
Operating Temperature
-40°C ~ 105°C
Package / Case
28-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5336BRUZ
Manufacturer:
Analog Devices Inc
Quantity:
1 885
Company:
Part Number:
AD5336BRUZ
Manufacturer:
Microchip
Quantity:
1 093
Part Number:
AD5336BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5336BRUZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Decoding Multiple AD5334/AD5335/AD5336/AD5344
The CS pin on these devices can be used in applications to decode
a number of DACs. In this application, all DACs in the system
receive the same data and WR pulses, but only the CS to one of
the DACs will be active at any one time, so data will only be
written to the DAC whose CS is low. If multiple AD5343s are
being used, a common HBEN line will also be required to
determine if the data is written to the high-byte or low-byte
register of the selected DAC.
The 74HC139 is used as a 2- to 4-line decoder to address any
of the DACs in the system. To prevent timing errors from oc-
curring, the enable input should be brought to its inactive state
while the coded address inputs are changing state. Figure 36 shows
a diagram of a typical setup for decoding multiple devices in a
system. Once data has been written sequentially to all DACs in
a system, all the DACs can be updated simultaneously using a
common LDAC line. A common CLR line can also be used to
reset all DAC outputs to zero (except on the AD5344).
AD5334/AD5335/AD5336/AD5344 as a Digitally Programmable
Window Detector
A digitally programmable upper/lower limit detector using two
of the DACs in the AD5334/AD5335/AD5336/AD5344 is
shown in Figure 37.
Any pair of DACs in the device may be used, but for simplicity
the description will refer to DACs A and B.
Care must be taken to connect the correct reference inputs to
the reference source. The AD5334 and AD5335 have only two
reference inputs, V
DACs C and D. If DACs A and B are used (for example) then
only V
REV. 0
ADDRESS
ENABLE
CODED
HBEN
LDAC
CLR
WR
REF
A0
A1
Figure 36. Decoding Multiple DAC Devices
A/B is needed. DACs C and D and V
1G
1A
1B
74HC139
REF
DGND
V
V
CC
DD
A/B for DACs A and B and V
1Y0
1Y1
1Y2
1Y3
A1
A0
HBEN*
WR
LDAC
CLR
CS
A1
A0
HBEN*
WR
LDAC
CLR
CS
A1
A0
HBEN*
WR
LDAC
CLR
CS
A1
A0
HBEN*
WR
LDAC
CLR
CS
*AD5335 ONLY
AD5334/AD5335/
AD5334/AD5335/
AD5334/AD5335/
AD5334/AD5335/
AD5336/AD5344
AD5336/AD5344
AD5336/AD5344
AD5336/AD5344
REF
C/D may be
INPUTS
INPUTS
INPUTS
INPUTS
REF
DATA
DATA
DATA
DATA
C/D for
–17–
used for some other purpose. The AD5336 and AD5344 have
separate reference inputs for each DAC.
The upper and lower limits for the test are loaded to DACs A
and B which, in turn, set the limits on the CMP04. If a signal at
the V
will indicate the fail condition.
Programmable Current Source
Figure 38 shows the AD5334/AD5335/AD5336/AD5344 used
as the control element of a programmable current source. In this
example, the full-scale current is set to 1 mA. The output volt-
age from the DAC is applied across the current setting resistor
of 4.7 kΩ in series with the 470 Ω adjustment potentiometer,
which gives an adjustment of about ± 5%. Suitable transistors to
place in the feedback loop of the amplifier include the BC107
and the 2N3904, which enable the current source to operate
from a minimum V
mined by the operating characteristics of the transistor. Suitable
amplifiers include the AD820 and the OP295, both having rail-
to-rail operation on their outputs. The current for any digital
input code and resistor value can be calculated as follows:
Where:
G is the gain of the buffer amplifier (1 or 2)
D is the digital input code
N is the DAC resolution (8, 10, or 12 bits)
R is the sum of the resistor plus adjustment potentiometer in kΩ
V
REF
5V
*ONLY ONE CHANNEL OF V
EXT
REF
AD780/REF192
WITH V
IN
AD5334/AD5335/AD5336/AD5344
Figure 37. Programmable Window Detector
input is not within the programmed window, an LED
GND
V
Figure 38. Programmable Current Source
IN
DD
0.1 F
V
= 5V
OUT
V
V
AD5336/AD5344
REF
REF
A
B
I
GND
=
SOURCE
10 F
0.1 F
0.1 F
G
V
V
V
×
OUT
OUT
DD
REF
V
of 6 V. The operating range is deter-
A
B
V
AD5334/AD5335/
REF
AND V
AD5336/AD5344
REF
10 F
V
*
IN
V
×
OUT
DD
GND
V
(
DD
2
= 5V
SHOWN
N
V
D
OUT
CMP04
×
1/2
R
*
)
mA
AD820/
OP295
5V
FAIL
1k
1/6 74HC05
PASS/
FAIL
V
SOURCE
LOAD
4.7k
470
PASS
1k