AD602JRZ-RL Analog Devices Inc, AD602JRZ-RL Datasheet - Page 21
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AD602JRZ-RL
Manufacturer Part Number
AD602JRZ-RL
Description
IC,Voltage Controlled Gain Amplifier,DUAL,CMOS,SOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
X-AMP®r
Datasheet
1.AD600JNZ.pdf
(28 pages)
Specifications of AD602JRZ-RL
Amplifier Type
Variable Gain
Number Of Circuits
2
Slew Rate
275 V/µs
-3db Bandwidth
35MHz
Current - Input Bias
350nA
Current - Supply
11mA
Current - Output / Channel
50mA
Voltage - Supply, Single/dual (±)
±4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Gain Bandwidth Product
-
Voltage - Input Offset
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
This system can, of course, be used as an AGC amplifier in
which the rms value of the input is leveled. Figure 43 shows the
decibel output voltage. More revealing is Figure 44, which
shows that the deviation from the ideal output predicted by
Equation 1 over the input range 80 μV to 500 mV rms is within
±0.5 dB, and within ±1 dB for the 80 dB range from 80 μV to
800 mV. By suitable choice of the input attenuator R1 + R2, this
can be centered to cover any range from a low of 25 mV to
250 mV to a high of 1 mV to 10 V, with appropriate correction
to the value of V
changes in the range. The gain ripple of ±0.2 dB seen in this
curve is the result of the finite interpolation error of the
X-AMP. Note that it occurs with a periodicity of 12 dB, twice
the separation between the tap points (because of the two
cascaded stages).
Figure 43. The dB Output of Figure 41’s Circuit is Linear over an 80 dB Range
–0.5
–1.0
–1.5
–2.0
–2.5
–1
–2
–3
–4
–5
2.5
2.0
1.5
1.0
0.5
5
4
3
2
1
0
Figure 44. Data from Figure 42 Presented as the Deviation
10µ
0
10µ
from the Ideal Output Given in Equation 4
100µ
REF
100µ
. Note that V
1m
INPUT SIGNAL (V rms)
1m
INPUT SIGNAL (V rms)
10m
SCALE
10m
is not affected by the
100m
100m
1
1
10
10
Rev. E | Page 21 of 28
This ripple can be canceled whenever the X-AMP stages are
cascaded by introducing a 3 dB offset between the two pairs of
control voltages. A simple means to achieve this is shown in
Figure 45: the voltages at C1HI and C2HI are split by
±46.875 mV, or ±1.5 dB. Alternatively, either one of these pins
can be individually offset by 3 dB and a 1.5 dB gain adjustment
made at the input attenuator (R1 + R2).
The error curve shown in Figure 46 demonstrates that over the
central portion of the range the output voltage can be maintained
close to the ideal value. The penalty for this modification is the
higher errors at the extremities of the range. The next two
applications show how three amplifier sections can be cascaded
to extend the nominal conversion range to 120 dB, with the
inclusion of simple LP filters of the type shown in Figure 37.
Very low errors can then be maintained over a 100 dB range.
100 dB TO 120 dB RMS RESPONDING CONSTANT
BANDWIDTH AGC SYSTEMS WITH HIGH
ACCURACY dB OUTPUTS
The next two applications double as both AGC amplifiers and
measurement systems. In both, precise gain offsets are used to
achieve either a high gain linearity of ±0.1 dB over the full
100 dB range or the optimal SNR at any gain.
AD600
U1
–0.5
–1.0
–1.5
–2.0
–2.5
2.5
2.0
1.5
1.0
0.5
0
10µ
NC = NO CONNECT
Figure 46. Using a 3 dB Offset Network Reduces Ripple
DEC
16
15
14
13
12
11
10
–6V
9
Figure 45. Reducing the Gain Error Ripple
A1CM
A1OP
VPOS
VNEG
A2OP
A2CM
C1HI
C2HI
100µ
10kΩ
+6V DEC
–6V DEC
78.7Ω 78.7Ω
–46.875mV
1m
INPUT SIGNAL (V rms)
10m
10kΩ
+46.875mV
MODIFICATION
3dB OFFSET
–6V DEC
C2
2µF
100m
+6V
DEC
AD600/AD602
NC
NC
NC
1
1
2
3
4
5
6
7
CAVG
VINP
VNEG
VLOG
BFOP
BFIN
10
AD636
U2