AD6634BBCZ Analog Devices Inc, AD6634BBCZ Datasheet - Page 52

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AD6634BBCZ

Manufacturer Part Number
AD6634BBCZ
Description
Pb-free Quad Receive Signal Processor
Manufacturer
Analog Devices Inc
Series
AD6634r
Datasheet

Specifications of AD6634BBCZ

Rf Type
Cellular, CDMA2000, EDGE, GPRS, GSM
Number Of Mixers
1
Voltage - Supply
3 V ~ 3.6 V
Package / Case
196-CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Frequency
-
Gain
-
Noise Figure
-
Secondary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD6634
Internal Address = 0x087
// holding registers for NCO phase byte wide access data
int d1, d0;
// NCO frequency word (16-bits wide)
NCO_PHASE = 0xCBEF;
// write ACR
write_micro(7, 0x03 );
// write CAR
write_micro(6, 0x87);
// write DR1 with D[15:8]
d1 = (NCO_PHASE & 0xFF00) >> 8;
write_micro(1, d1);
// write DR0 with D[7:0]
// On this write all data is transferred to the internal address
d0 = NCO_FREQ & 0xFF;
write_micro(0, d0);
} // end of main
INTERNAL READ ACCESS
A read is performed by first writing the CAR and AMR as with
a write. The data registers (DR2–DR0) are then read in the
reverse order that they were written. First, the Least Significant
Byte of the data (D[7:0]) is read from DR0. On this transaction
the high bytes of the data are moved from the internal address
pointed to by the CAR and AMR into the remaining data registers
(DR2–DR1). This data can then be read from the data registers
using the appropriate 3-bit addresses. The number of data registers
used depends solely on the amount of data to be read or written.
Any unused bit in a data register should be masked out for a read.
*/
MAX
1.70
15.00 BSC SQ
TOP VIEW
196-Lead Chip Scale Ball Grid Array [CSPBGA]
COMPLIANT TO JEDEC STANDARDS MO-192AAE-1
Dimensions shown in millimeters
OUTLINE DIMENSIONS
DETAIL A
(BC-196)
DIAMETER
–52–
BALL
BALL PITCH
0.70
0.60
0.50
Read Pseudocode
int read_micro(ext_address);
main();
{
/* This code shows the reading of the first RCF coefficient
using the read_micro function as defined above. The variable
address is the External Address A[2..0].
Internal Address = 0x000
// holding registers for the coefficient
int d2, d1, d0;
// coefficient (20-bits wide)
long coefficient;
// write AMR
write_micro(7, 0x00 );
// write LAR
write_micro(6, 0x00);
/* read D[7:0] from DR0. All data is moved from the Internal
Registers to the interface registers on this access.
*/
d0 = read_micro(0) & 0xFF;
// read D[15:8] from DR1
d1 = read_micro(1) & 0xFF;
// read D[23:16] from DR2
d2 = read_micro(2) & 0x0F;
coefficient = d0 + (d1 << 8) + (d2 << 16);
} // end of main
1.00 BSC
*/
COPLANARITY
DETAIL A
14 13 12 11 10 9 8 7 6 5 4 3 2 1
0.20
BOTTOM VIEW
13.00 BSC
SQ
SEATING PLANE
0.30 MIN
A1 CORNER
A
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