AD73360ASUZ Analog Devices Inc, AD73360ASUZ Datasheet - Page 17
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AD73360ASUZ
Manufacturer Part Number
AD73360ASUZ
Description
6-CHANNEL SIGMA-DELTA ADC I.C.
Manufacturer
Analog Devices Inc
Datasheet
1.AD73360LARZ-REEL.pdf
(35 pages)
Specifications of AD73360ASUZ
Number Of Bits
16
Number Of Channels
6
Power (watts)
80mW
Voltage - Supply, Analog
2.7 V ~ 3.3 V
Voltage - Supply, Digital
2.7 V ~ 3.3 V
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD73360LEB - BOARD EVAL FOR AD73360L
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD73360ASUZ
Manufacturer:
ADI
Quantity:
219
Company:
Part Number:
AD73360ASUZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Company:
Part Number:
AD73360ASUZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
CONTROL REGISTER G
CONTROL REGISTER H
REGISTER BIT DESCRIPTIONS
Control Register A
CRA:0
CRA:1
CRA:2
CRA:3
CRA:4–6
CRA:7
Control Register B
CRB:0–1
CRB:2–3
CRB:4–6
CRB:7
REV. A
Data/Program Mode. This bit controls the operating mode of the AD73360. If CRA:1 is 0, then a 0 in this bit
places the part in Program Mode. If CRA:1 is 0, then a 1 in this bit places the part in Data Mode.
Mixed Mode. If this bit is a 0, then the operating mode is determined by CRA:0. If this bit is a 1, then the
part operates in Mixed Mode.
Reserved. This bit is reserved and should be programmed to 0 to ensure correct operation.
SPORT Loop Back. This is a diagnostic mode. This bit should be set to 0 to ensure correct operation.
Device Count Bits. These bits tell the AD73360 how many devices are used in a cascade. All devices in the
cascade should be programmed to the same value ensure correct operation. See Table XVIII.
Reset. Writing a 1 to this bit will initiate a software reset of the AD73360.
Decimation Rate. These bits are used to set the decimation of the AD73360. See Table VII.
Serial Clock Divider. These bits are used to set the serial clock frequency. See Table VI.
Master Clock Divider. These bits are used to set the Master Clock Divider ratio. See Table V.
Control Echo Enable. Setting this bit to a 1 will cause the AD73360 to write out any control words it receives.
This is used as a diagnostic mode. This bit should be set to 0 for correct operation in Mixed Mode or Data Mode.
Bit Name
0
1
2
3
4
5
6
7
Bit Name
0
1
2
3
4
5
6
7
SEEN
INV
7
7
CH1
CH2
CH3
CH4
CH5
CH6
RMOD
SEEN
CH1
CH2
CH3
CH4
CH5
CH6
TME
INV
Table XIII. Control Register G Description
Table XIV. Control Register H Description
RMOD
TME
6
6
Description
Channel 1 Select
Channel 2 Select
Channel 3 Select
Channel 4 Select
Channel 5 Select
Channel 6 Select
Reset Analog Modulator
Enable Single-Ended Input Mode
Description
Channel 1 Select
Channel 2 Select
Channel 3 Select
Channel 4 Select
Channel 5 Select
Channel 6 Select
Test Mode Enable
Enable Invert Channel Mode
CH6
CH6
5
5
–17–
CH5
CH5
4
4
CH4
CH4
3
3
CH3
CH3
2
2
CH2
CH2
1
1
CH1
CH1
0
0
AD73360