AD7706BRZ-REEL7 Analog Devices Inc, AD7706BRZ-REEL7 Datasheet - Page 33
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AD7706BRZ-REEL7
Manufacturer Part Number
AD7706BRZ-REEL7
Description
IC,Data Acquisition Signal Conditioner,3-CHANNEL,16-BIT,CMOS,SOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7705BRUZ.pdf
(44 pages)
Specifications of AD7706BRZ-REEL7
Number Of Bits
16
Sampling Rate (per Second)
500
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7706EBZ - BOARD EVALUATION FOR AD7706
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CONFIGURING THE AD7705/AD7706
The AD7705/AD7706 contain six on-chip registers that the user
can access via the serial interface. Communication with any of
these registers is initiated by first writing to the communication
register. Figure 21 outlines a flowchart of the sequence used to
configure registers after a power-up or reset on the AD7705;
similar procedures apply to the AD7706.
WRITE TO COMMUNICATIONS REGISTER SETTING UP
NEXT OPERATION TO BE A READ FROM THE DATA
REGISTER (38 HEX)
WRITE TO COMMUNICATIONS REGISTER SELECTING
CHANNEL & SETTING UP NEXT OPERATION TO BE A
WRITE TO THE CLOCK REGISTER (20 HEX)
WRITE TO COMMUNICATIONS REGISTER SELECTING
CHANNEL & SETTING UP NEXT OPERATION TO BE A
WRITE TO THE SETUP REGISTER (10 HEX)
WRITE TO CLOCK REGISTER SETTING THE CLOCK
BITS IN ACCORDANCE WITH THE APPLIED MASTER
CLOCK SIGNAL AND SELECT UPDATE RATE FOR
SELECTED CHANNEL (0C HEX)
WRITE TO SETUP REGISTER CLEARING F SYNC,
SETTING UP GAIN, OPERATING CONDITIONS &
INITIATING A SELF-CALIBRATION ON SELECTED
CHANNEL (40 HEX)
CONFIGURE & INITIALIZE μC/μP SERIAL PORT
POWER-ON/RESET FOR AD7705
READ FROM DATA REGISTER
NO
POLL DRDY PIN
START
DRDY
LOW?
Figure 21. Flowchart for Setting Up and Reading from the AD7705
YES
Rev. C | Page 33 of 44
WRITE TO COMMUNICATIONS REGISTER SETTING UP NEXT
OPERATION TO BE A READ FROM THE COMMUNICATIONS
REGISTER (08 HEX)
The flowchart also shows two read options—one polls the DRDY
pin, and the other interrogates the DRDY pin. In addition,
Figure 21 shows a series of words that should be written to the
registers for the following operating conditions: Gain 1, no
filter sync, bipolar mode, buffer off, clock of 4.9512 MHz, and
output rate of 50 Hz.
WRITE TO COMMUNICATIONS REGISTER SETTING UP
NEXT OPERATION TO BE A READ FROM THE DATA
REGISTER (38 HEX)
POLL DRDY BIT OF COMMUNICATIONS REGISTER
READ FROM COMMUNICATIONS REGISTER
READ FROM DATA REGISTER
NO
DRDY
LOW?
YES
AD7705/AD7706