AD7793BRU Analog Devices Inc, AD7793BRU Datasheet - Page 5

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AD7793BRU

Manufacturer Part Number
AD7793BRU
Description
2 Channel, 24-Bit SD ADC ,PGA &REF IC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7793BRU

Design Resources
Fully Isolated Input Module Based on AD7793 and ADuM5401(CN0066) Fully Isolated Input Module Based on AD7793, ADuM5401, and a High Performance In-Amp (CN0067)
Number Of Bits
24
Sampling Rate (per Second)
500
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
2.5mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7793EBZ - BOARD EVALUATION FOR AD7793
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant

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Parameter
LOGIC OUTPUTS (INCLUDING CLK)
SYSTEM CALIBRATION
POWER REQUIREMENTS
1
2
3
4
5
6
7
Temperature range is –40°C to +105°C. At the 19.6 Hz and 39.2 Hz update rates, the INL, power supply rejection (PSR), common-mode rejection (CMR), and normal
mode rejection (NMR) do not meet the data sheet specification if the voltage on the AIN(+) or AIN(−) pins exceed AV
the INL, for example, is reduced to 18 ppm of FS typically while the PSR is reduced to 69 dB typically. Therefore, for guaranteed performance at these update rates, the
absolute voltage on the analog input pins needs to be below AV
Specification is not production tested, but is supported by characterization data at initial product release.
Following a calibration, this error is in the order of the noise for the programmed gain and update rate selected.
Recalibration at any temperature removes these errors.
Full-scale error applies to both positive and negative full-scale and applies at the factory calibration conditions (AV
FS[3:0] are the four bits used in the mode register to select the output word rate.
Digital inputs equal to DV
SCLK, CLK, and DIN (Schmitt-
Input Currents
Input Capacitance
Floating-State Leakage Current
Floating-State Output Capacitance
Data Output Coding
Power Supply Voltage
Power Supply Currents
V
V
V
V
Full-Scale Calibration Limit
Zero-Scale Calibration Limit
Input Span
OH
OL
OH
OL
Triggered Input)
V
V
V
V
V
V
AV
DV
I
I
DD
DD
, Output Low Voltage
, Output Low Voltage
, Output High Voltage
, Output High Voltage
T
T
T
T
T
T
(+)
(–)
(+) − V
(+)
(–)
(+) − V
DD
DD
Current
(Power-Down Mode)
to GND
to GND
T
T
(−)
(−)
2
2
DD
7
or GND with excitation currents and bias voltage generator disabled.
2
2
2
2
AD7792B/AD7793B
1.4/2
0.8/1.7
0.1/0.17
0.9/2
0.4/1.35
0.06/0.13
±10
10
DV
0.4
4
0.4
±10
10
Offset binary
+1.05 × FS
−1.05 × FS
0.8 × FS
2.1 × FS
2.7/5.25
2.7/5.25
140
185
400
500
1
DD
− 0.6
DD
− 1.6 V.
Rev. B | Page 5 of 32
1
Unit
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
μA max
pF typ
V min
V max
V min
V max
μA max
pF typ
V max
V min
V max
V min/max
V min/max
μA max
μA max
μA max
μA max
μA max
V min
Test Conditions/Comments
DV
DV
DV
DV
DV
DV
V
All digital inputs
DV
DV
DV
DV
(CLK)
110 μA typ @ AV
unbuffered mode, external reference
130 μA typ @ AV
buffered mode, gain = 1 or 2, external reference
300 μA typ @ AV
gain = 4 to 128, external reference
400 μA typ @ AV
gain = 4 to 128, internal reference
IN
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= DV
DD
= 5 V
= 5 V
= 5 V
= 3 V
= 3 V
= 3 V
= 3 V, I
= 3 V, I
= 5 V, I
= 5 V, I
DD
= 4 V, gain = 1, T
− 16 V typically. When this voltage is exceeded,
DD
or GND
SOURCE
SINK
SOURCE
SINK
= 100 μA
= 1.6 mA (DOUT/RDY)/800 μA
DD
DD
DD
DD
= 100 μA
= 200 μA
= 3 V, 125 μA typ @ AV
= 3 V, 165 μA typ @ AV
= 3 V, 350 μA typ @ AV
= 3 V, 450 μA typ @ AV
A
= 25°C).
AD7792/AD7793
DD
DD
DD
DD
= 5 V,
= 5 V,
= 5 V,
= 5 V,

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