AD7829BRZ Analog Devices Inc, AD7829BRZ Datasheet - Page 19

• Manufacturer Part Number: AD7829BRZ
• Description: IC,Data Acquisition System,8-CHANNEL,8-BIT,SOP,28PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD7829BRZ

• Number Of Bits: 8
• Sampling Rate (per Second): 2M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 36mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Number Of Elements: 1
• Resolution: 8Bit
• Architecture: Semiflash
• Sample Rate: 2MSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 2/2.5V
• Differential Input: No
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 36mW
• Differential Linearity Error: ±0.75LSB
• Integral Nonlinearity Error: ±0.75LSB
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SOIC W
• Input Signal Type: Single-Ended
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7822 STANDALONE OPERATION
The AD7822, being the single channel device, does not have any
multiplexer addressing associated with it and can be controlled
with just one signal, that is, the CONVST signal. As shown in
Figure 31, the RD and CS pins are both tied to the EOC pin.
AD7822
CONVST
DB7 TO DB0
A15 TO A3
EOC
RD
CS
ADDRESS
DECODE
Figure 30. AD7825/AD7829 Simplified Microinterfacing Scheme
CS
RD
DB7 TO DB0
A0
A1
A2
LATCH/ASIC
DSP/
AD7825/
AD7829
Figure 31. AD7822 Standalone Operation
Rev. C | Page 19 of 28
DB0 TO DB7
A15 TO A3
A2 TO A0
DB0 TO DB7
CONVST
CS
RD
EOC
CS
RD
The resulting signal can be used as an interrupt request signal
(IRQ) on a DSP, as a WR signal to memory, or as a CLK to a
latch or ASIC. The timing for this interface, as shown in Figure 31,
demonstrates how, with the CONVST signal alone, a conversion
can be initiated, data is latched out, and the operating mode of
the AD7822 can be selected.
MICROPROCESSOR READ CYCLE
(CHANNEL SELECTION A0 TO A2)
t
1
MUX ADDRESS
LATCHED
MUX ADDRESS
ADC I/O ADDRESS
AD7822/AD7825/AD7829
A/D RESULT
A/D RESULT
t
4