AD7887AR Analog Devices Inc, AD7887AR Datasheet - Page 4

• Manufacturer Part Number: AD7887AR
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc

Specifications of AD7887AR

• Package/case: 8-SOIC
• Features: +2.7 To 5.25V, 2?Channel, Power, 125kSPS
• Interface Type: Serial
• Number Of Bits: 12
• Number Of Channels: 1
• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Design Resources: Software Calibrated, 1 MHz to 8 GHz, 70 dB RF Power Measurement System Using AD8318 (CN0150)
• Sampling Rate (per Second): 125k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 3.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD7887
Parameter
CONVERSION RATE
POWER REQUIREMENTS
1
2
3
4
5
6
Temperature range for A and B versions is −40°C to +125°C.
See the Terminology section.
SNR calculation includes distortion and noise components.
Sample tested at +25°C to ensure compliance.
All digital inputs at GND except CS at V
SCLK at GND when SCLK off. All digital inputs at GND except for CS at V
Throughput Time
Track/Hold Acquisition Time
Conversion Time
V
I
Normal Mode Power Dissipation
Shutdown Power Dissipation
Standby Power Dissipation
DD
DD
Normal Mode
Using Standby Mode (Mode 4)
Using Shutdown Mode (Modes 1, 3)
Standby Mode
Shutdown Mode
Static
Operational (f
5
6
(Mode 2)
SAMPLE
6
= 125 kSPS)
2
DD
. No load on the digital outputs. Analog inputs at GND.
A Version
16
1.5
14.5
+2.7/+5.25
700
850
700
450
120
12
210
1
2
3.5
2.1
5
3
1.05
630
1
B Version
16
1.5
14.5
+2.7/+5.25
700
850
700
450
120
12
210
1
2
3.5
2.1
5
3
1.05
630
DD
Rev. D | Page 4 of 24
. No load on the digital outputs. Analog inputs at GND.
1
Unit
SCLK cycles
SCLK cycles
SCLK cycles
V min/max
μA max
μA typ
μA typ
μA typ
μA typ
μA typ
μA max
μA max
μA max
mW max
mW max
μW max
μW max
mW max
μW max
Test Conditions/Comments
Conversion time plus acquisition time is 125 kSPS,
with 2 MHz Clock
7.25 μs (2 MHz Clock)
Internal reference enabled
Internal reference disabled
f
f
V
V
V
V
V
V
f
V
V
V
SAMPLE
SAMPLE
SAMPLE
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 2.7 V to 5.25 V
= 2.7 V to 3.6 V
= 4.75 V to 5.25 V
= 5 V
= 3 V
= 5 V
= 3 V
= 5 V
= 3 V
= 50 kSPS
= 10 kSPS
= 1 kSPS