AD7999YRJZ-1RL Analog Devices Inc, AD7999YRJZ-1RL Datasheet - Page 3

IC,Data Acquisition System,4-CHANNEL,8-BIT,TSSOP,8PIN,PLASTIC

AD7999YRJZ-1RL

Manufacturer Part Number
AD7999YRJZ-1RL
Description
IC,Data Acquisition System,4-CHANNEL,8-BIT,TSSOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7999YRJZ-1RL

Design Resources
Using AD8599 as an Ultralow Distortion Driver for the AD7999 (CN0045)
Number Of Bits
8
Sampling Rate (per Second)
1M
Data Interface
I²C, Serial
Number Of Converters
1
Power Dissipation (max)
4.68mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7999YRJZ-1RL
Manufacturer:
ADI
Quantity:
3 000
SPECIFICATIONS
AD7991
The temperature range of the Y version is −40°C to +125°C. Unless otherwise noted, V
and T
Table 2.
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
REFERENCE INPUT
Signal-to-Noise and Distortion (SINAD)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
Intermodulation Distortion (IMD)
Channel-to-Channel Isolation
Full-Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Error Matching
Offset Temperature Drift
Gain Error
Gain Error Matching
Gain Temperature Drift
Input Voltage Range
DC Leakage Current
Input Capacitance
V
DC Leakage Current
V
Input Impedance
REF
REF
Second-Order Terms
Third-Order Terms
A
Input Voltage Range
Input Capacitance
= T
1
MIN
4
4
to T
2, 5
MAX
.
4
4
2, 3
4
4
4
4
4
4
4
Min
69.5
70
12
0
1.2
Typ
70
71
−92
−88
−90
14
1.5
±0.5
±0.5
±1
4.43
0.69
34
4
35
5
5
35
69
Y Version
Rev. B | Page 3 of 28
Max
−75.5
−77.5
±1
±0.9
±7
±0.5
±2
±0.7
V
±1
V
±1
REF
DD
Unit
dB
dB
dB
dB
dB
dB
dB
MHz
MHz
Bits
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
LSB
LSB
ppm/°C
V
μA
pF
pF
pF
pF
V
μA
pF
pF
DD
= 2.7 V to 5.5 V, V
Test Conditions/Comments
See the Sample Delay and Bit Trial Delay
section, f
from 1.7 MHz to 3.4 MHz
f
fa = 11 kHz, fb = 9 kHz for f
1.7 MHz to 3.4 MHz
fa = 5.4 kHz, fb = 4.6 kHz for f
to 400 kHz
f
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 12 bits
V
Channel 0 to Channel 2—during
acquisition phase
Channel 0 to Channel 2—outside
acquisition phase
Channel 3—during acquisition phase
Channel 3—outside acquisition phase
Outside conversion phase
During conversion phase
IN
IN
REF
AD7991/AD7995/AD7999
= 1 kHz sine wave for f
= 10 kHz
= V
IN3
IN
/V
= 10 kHz sine wave for f
REF
REF
= 2.5 V, f
or V
DD
SCL
SCL
up to 400 kHz
= 3.4 MHz,
SCL
SCL
from
up
SCL

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