AD812ANZ Analog Devices Inc, AD812ANZ Datasheet - Page 6

• Manufacturer Part Number: AD812ANZ
• Description: DUAL LO PWR I-FDBK OP AMP
• Manufacturer: Analog Devices Inc

Specifications of AD812ANZ

• Applications: Current Feedback
• Number Of Circuits: 2
• -3db Bandwidth: 145MHz
• Slew Rate: 1600 V/µs
• Current - Supply: 4.5mA
• Current - Output / Channel: 50mA
• Voltage - Supply, Single/dual (±): 2.4 V ~ 36 V, ±1.2 V ~ 18 V
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Amplifier Type: Current Feedback, Low Power
• Bandwidth: 100 MHz
• Common Mode Rejection Ratio: 60
• Current, Input Bias: 7 μA (+Input), 0.3 μA (-Input)
• Current, Output: 50 mA
• Current, Supply: 5.5 mA
• Harmonic Distortion: -90 dBc
• Impedance, Thermal: 90 °C/W
• Number Of Amplifiers: Dual
• Package Type: Mini-PDIP-8
• Resistance, Input: 15 Megohms (+Input), 65 Ohms (-Input)
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Input: ±13.5 V (Common-Mode)
• Voltage, Noise: 3.5 nV/sqrt Hz
• Voltage, Offset: 2 mV
• Voltage, Output, High: +14 V
• Voltage, Output, Low: -14 V
• Voltage, Supply: ±15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD812
Operation Using a Single Supply
The AD812 will operate with total supply voltages from 36 V
down to 2.4 V. With proper biasing (see Figure 53), it can be an
outstanding single supply video amplifier. Since the input and
output voltage ranges extend to within 1 volt of the supply rails,
it will handle a 1.3 V p-p signal on a single 3.3 V supply, or a
3 V p-p signal on a single 5 V supply. The small signal, 0.1 dB
bandwidths will exceed 10 MHz in either case, and the large
signal bandwidths will exceed 6 MHz.
The capacitively coupled cable driver in Figure 53 will achieve
outstanding differential gain and phase errors of 0.07% and 0.06
degrees respectively on a single 5 V supply. Resistor R2, in this
circuit, is selected to optimize the differential gain and phase by
operating the amplifier in its most linear region. To optimize the
circuit for a 3 V supply, a value of 8 k
V
1 F
IN
(4.19
C2
0.165
0.125 (3.18)
Figure 53. Biasing for Single Supply Operation
30 F
C3
2 F
11.8k
C1
0.018
0.25)
(0.46 +0.08)
0.01
MIN
9k
R2
R1
649
0.003
8
1
0.39 (9.91)
PIN 1
(2.54)
0.10
BSC
1k
R3
AD812
8-Lead Plastic DIP
0.033 (0.84)
649
5
4
8
4
NOM
0.060 (1.52)
0.015 (0.38)
(6.35)
0.25
+V
(N-8)
S
SEATING
PLANE
C
47 F
OUT
is recommended for R2.
0.325 (8.25)
0.300 (7.62)
75
0.015 (0.381)
0.008 (0.204)
CABLE
75
Dimensions shown in inches and (mm).
0.195 (4.95)
0.115 (2.93)
OUTLINE DIMENSIONS
75
V
OUT
–16–
Figure 54. Closed-Loop Gain and Phase vs. Frequency,
Circuit of Figure 53
Figure 55. Pulse Response of the Circuit of Figure 53 with
V
S
= 5 V
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
0.1574 (4.00)
0.1497 (3.80)
0.0098 (0.25)
0.0040 (0.10)
0.5
0
SEATING
1
PLANE
100
90
10
0%
PHASE
GAIN
PIN 1
0.1968 (5.00)
0.1890 (4.80)
0.0500
(1.27)
BSC
8
1
500mV
1V
8-Lead Plastic SOIC
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
5
4
10
FREQUENCY – MHz
0.2440 (6.20)
0.2284 (5.80)
(SO-8)
0.0098 (0.25)
0.0075 (0.19)
100
V
8
0
S
50ns
0.0196 (0.50)
0.0099 (0.25)
= 5V
0.0500 (1.27)
0.0160 (0.41)
1000
45
V
V
90
0
–90
–180
–270
IN
OUT