AD9219ABCPZRL7-65 Analog Devices Inc, AD9219ABCPZRL7-65 Datasheet - Page 6
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AD9219ABCPZRL7-65
Manufacturer Part Number
AD9219ABCPZRL7-65
Description
Quad 10-bit 65 MSPS Serial LVDS ADCPBFre
Manufacturer
Analog Devices Inc
Datasheet
1.AD9219ABCPZRL7-40.pdf
(52 pages)
Specifications of AD9219ABCPZRL7-65
Number Of Bits
10
Sampling Rate (per Second)
65M
Data Interface
Serial, SPI™
Number Of Converters
4
Power Dissipation (max)
408mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9219
SWITCHING SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 4.
Parameter
CLOCK
OUTPUT PARAMETERS
APERTURE
1
2
3
4
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details of how these tests were completed.
Measured on standard FR-4 material.
Can be adjusted via the SPI.
t
SAMPLE
Maximum Clock Rate
Minimum Clock Rate
Clock Pulse Width High (t
Clock Pulse Width Low (t
Propagation Delay (t
Rise Time (t
Fall Time (t
FCO Propagation Delay (t
DCO Propagation Delay (t
DCO to Data Delay (t
DCO to FCO Delay (t
Data to Data Skew
Wake-Up Time (Standby)
Wake-Up Time (Power-Down)
Pipeline Latency
Aperture Delay (t
Aperture Uncertainty (Jitter)
Out-of-Range Recovery Time
(t
/20 is based on the number of bits divided by 2 because the delays are based on half duty cycles.
3
DATA-MAX
1
, 2
F
R
) (20% to 80%)
− t
) (20% to 80%)
DATA-MIN
A
)
3
FRAME
PD
DATA
)
)
EH
FCO
)
CPD
)
EL
4
)
4
)
)
)
4
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
25°C
25°C
25°C
Min
40
2.0
2.0
(t
(t
SAMPLE
SAMPLE
/20) − 300
/20) − 300
AD9219-40
Typ
12.5
12.5
2.5
300
300
2.5
t
(t
(t
(t
±50
600
375
8
500
<1
1
FCO
SAMPLE
SAMPLE
SAMPLE
+
Rev. D | Page 6 of 52
/20)
/20)
/20)
Max
10
3.5
3.5
(t
(t
±150
SAMPLE
SAMPLE
/20) + 300
/20) + 300
Min
65
2.0
2.0
(t
(t
SAMPLE
SAMPLE
/20) − 300
/20) − 300
AD9219-65
Typ
7.7
7.7
2.5
300
300
2.5
t
(t
(t
(t
±50
600
375
8
500
<1
2
FCO
SAMPLE
SAMPLE
SAMPLE
+
/20)
/20)
/20)
Max
(t
(t
10
3.5
3.5
±150
SAMPLE
SAMPLE
/20) + 300
/20) + 300
Unit
MSPS
MSPS
ns
ns
ns
ps
ps
ns
ns
ps
ps
ps
ns
μs
CLK
cycles
ps
ps rms
CLK
cycles