AD9229BCPZ-65 Analog Devices Inc, AD9229BCPZ-65 Datasheet
AD9229BCPZ-65
Specifications of AD9229BCPZ-65
Related parts for AD9229BCPZ-65
AD9229BCPZ-65 Summary of contents
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FEATURES Four ADCs in 1 package Serial LVDS digital output data rates to 780 Mbps (ANSI-644) Data and frame clock outputs SNR = 69.5 dB (to Nyquist) Excellent linearity DNL = ±0.3 LSB (typical) INL = ±0.4 LSB (typical) 400 ...
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AD9229 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Specifications .......................................................................... 4 Digital Specifications ................................................................... 5 Switching Specifications .............................................................. 6 Timing Diagram ...
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SPECIFICATIONS AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless otherwise noted. Table 1. Parameter RESOLUTION ACCURACY No Missing Codes Offset Error Offset Matching ...
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AD9229 AC SPECIFICATIONS AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless otherwise noted. Table 2. Parameter SIGNAL-TO-NOISE RATIO (SNR 2.4 MHz ...
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DIGITAL SPECIFICATIONS AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless otherwise noted. Table 3. Parameter Temperature CLOCK INPUT Logic Compliance High Level Input ...
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AD9229 SWITCHING SPECIFICATIONS AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless otherwise noted. Table 4. Test Parameter Temp Level CLOCK Maximum Clock Rate ...
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TIMING DIAGRAM N – 1 AIN t A CLK DCO– DCO+ FCO– FCO+ D– CPD t t FCO FRAME t t DATA PD MSB D10 – 10) (N – ...
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AD9229 ABSOLUTE MAXIMUM RATINGS Table 5. With Parameter Respect To ELECTRICAL AVDD AGND DRVDD DRGND AGND DRGND AVDD DRVDD Digital Outputs (D+, D–, DRGND DCO+, DCO–, FCO+, FCO–) LVDSBIAS DRGND CLK AGND VIN+, VIN– AGND PDWN, DTP AGND REFT, REFB ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DRGND DRVDD AVDD AGND PDWN AVDD AGND VIN+A VIN–A AGND CONNECT Table 6. Pin Function Descriptions Pin No. Mnemonic Description 5, 8, 16, 21, AVDD Analog Supply 29 12, ...
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AD9229 EQUIVALENT CIRCUITS AVDD VIN+, VIN– AGND Figure 4. Equivalent Analog Input Circuit AVDD CLK 170Ω AGND Figure 5. Equivalent Clock Input Circuit AVDD PDWN 375Ω AGND Figure 6. Equivalent Digital Input Circuit V D– V Figure 7. Equivalent Digital ...
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TYPICAL PERFORMANCE CHARACTERISTICS 0 –20 –40 –60 –80 –100 –120 0 4.1 8.1 12.2 16.3 FREQUENCY (MHz) Figure 9. Single-Tone 32k FFT with f = 2.4 MHz –20 –40 –60 –80 –100 –120 0 4.1 8.1 12.2 ...
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AD9229 95 1V p-p, SFDR (dBc p-p, SFDR (dBc p-p, SNR (dB p-p, SNR (dB ENCODE (MSPS) Figure 15. SNR/SFDR vs ...
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SFDR (dBc SNR (dB 100 FREQUENCY (MHz) Figure 21. SNR/SFDR vs MHz IN SAMPLE 0 AIN1 AND AIN2= –7.0dBFS SFDR = 73.0dBc IMD2 ...
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AD9229 –5 –10 –15 –20 –40 – TEMPERATURE (°C) Figure 27. Gain Error vs. Temperature 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0 512 1024 1536 2048 CODE Figure 28. ...
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FREQUENCY (MHz) Figure 33. Full Power Bandwidth vs. Frequency, f 400 450 500 = 65 MSPS SAMPLE Rev Page 15 of ...
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AD9229 TERMINOLOGY Analog Bandwidth Analog bandwidth is the analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced from full scale. Aperture Delay Aperture delay is a ...
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Out-of-Range Recovery Time Out-of-range recovery time is the time it takes for the ADC to reacquire the analog input after a transient from 10% above positive full scale to 10% above negative full scale, or from 10% below negative full ...
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AD9229 THEORY OF OPERATION The AD9229 architecture consists of a front-end switched capa- citor sample-and-hold amplifier (SHA) followed by a pipelined ADC. The pipelined ADC is divided into three sections: a 4-bit first stage followed by eight 1.5-bit stages and ...
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An internal reference buffer creates the positive and negative reference voltages, REFT and REFB, respectively, that defines the span of the ADC core. The output common-mode of the reference buffer is set to midsupply, and the REFT and REFB voltages ...
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AD9229 High speed, high resolution ADCs are sensitive to the quality of the clock input. The degradation in SNR at a given full-scale input frequency (f ) due only to aperture jitter (t A calculated with the following equation: SNR ...
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The AD9229’s LVDS outputs facilitate interfacing with LVDS receivers in custom ASICs and FPGAs that have LVDS capa- bility for superior switching performance in noisy environ- ments. Single point-to-point net topologies are recommended with a 100 Ω termination resistor placed ...
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AD9229 VIN+ VIN– ADC CORE VREF 10μF 0.1μF SELECT LOGIC SENSE Figure 42. Internal Reference Configuration VIN+ VIN– ADC CORE VREF + 10μF 0.1μF SELECT R2 LOGIC SENSE R1 Figure 43. Programmable Reference Configuration If the internal reference of the ...
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Exposed Paddle Thermal Heat Slug Recommendations It is mandatory that the exposed paddle on the underside of the ADC be connected to analog ground (AGND) to achieve the best electrical and thermal performance of the AD9229. A continuous exposed copper ...
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AD9229 EVALUATION BOARD The AD9229 evaluation board provides all of the support cir- cuitry required to operate the ADC in its various modes and configurations. The converter can be driven differentially through a transformer (default) or through the AD8332 driver. ...
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DEFAULT OPERATION AND JUMPER SELECTION SETTINGS The following is a list of the default and optional settings or modes allowed on the AD9229 Rev C evaluation board. • POWER: Connect the switching power supply that is supplied in the evaluation ...
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AD9229 VGA INPUT CONNECTION INH1 CHANNEL A R101 P101 0Ω DNP A IN R102 65Ω VGA INPUT CONNECTION INH2 CHANNEL B R114 P103 0Ω DNP A IN R115 65Ω VGA INPUT CONNECTION INH3 CHANNEL C R127 P105 0Ω DNP A ...
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DRVDD_DUT DIGITAL TEST AVDD_DUT PATTERN ENABLE R201 10kΩ PIN 1 TO PIN 2 = 1010 1010 1010 2 PIN 2 TO PIN 3 = 1000 0000 0000 1 3 JP202 R202 10kΩ PWDN ENABLE JP201 AVDD_DUT R228 R203 10kΩ 10kΩ ...
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AD9229 POPULATE L305 TO L312 WITH 0Ω RESISTORS OR DESIGN YOUR OWN FILTER AVDD_VGA R312 10Ω R311 10kΩ DNP C313 0.1μF C315 0.1μF R314 C317 10kΩ 10μF 0.1μF DNP : DO NOT POPULATE Figure 50. Evaluation Board Schematic, Optional DUT ...
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POPULATE L405 TO L412 WITH 0Ω RESISTORS OR DESIGN YOUR OWN FILTER L405 DNP L409 DNP C407 0.1μF R403 187Ω AVDD_VGA R402 U401 10kΩ 25 ENBV R401 26 10kΩ ENBL DNP 27 HILO 28 VCM1 29 VIN1 30 VIP1 31 ...
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AD9229 POWER SUPPLY INPUT 6V 2A MAX U501 ADP33339AKC-3 3 PWR_IN INPUT OUTPUT1 C502 OUTPUT4 1μF GND 1 U503 ADP33339AKC-3 3 PWR_IN INPUT OUTPUT1 C506 OUTPUT4 1μF GND 1 DNP : DO NOT POPULATE F501 P503 SMDC110F 1 C501 10μF ...
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DECOUPLING CAPACITORS DRVDD_DUT C613 C614 0.1μF 0.1μF AVDD_VGA C617 C618 C619 C620 0.1μF 0.1μF 0.1μF 0.1μF AVDD_DUT C627 C630 C631 C621 0.1μF 0.1μF 0.1μF 0.1μ MOUNTING HOLES CONNECTED TO GROUND DNP : DO NOT POPULATE Figure ...
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AD9229 Figure 54. Evaluation Board Layout, Primary Side Rev Page ...
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Figure 55. Evaluation Board Layout, Ground Plane Rev Page AD9229 ...
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AD9229 Figure 56. Evaluation Board Layout, Power Plane Rev Page ...
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Figure 57. Evaluation Board Layout, Secondary Side (Mirrored Image) Rev Page AD9229 ...
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AD9229 Table 11. Evaluation Board Bill of Materials (BOM) Qnty. per Item Board REFDES 1 1 AD9229LFCSP_REVC 2 59 C327, C328, C630, C628, C629, C631, C632, C101, C102, C107, C108, C109, C114, C115, C116, C121, C122, C123, C128, C201, C203, ...
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Qnty. per Item Board REFDES 19 6 L501, L502, L503, L504, L505, L506 20 4 L313, L314, L413, L414 21 12 L305, L306, L307, L308, L309, L310, L405, L406, L407, L408, L409, L410, L311, L312, L411, L412 22 1 OSC200 ...
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AD9229 Qnty. per Item Board REFDES 41 4 R305, R308, R404, R407, R500 42 4 R315, R316, R412, R413 43 4 T101, T102, T103, T104 44 2 U501, U503 45 2 U301, U401 46 1 U502 47 1 U201 48 ...
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OUTLINE DIMENSIONS PIN 1 INDICATOR TOP VIEW 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE Model 1 Temperature Range AD9229ABCPZ-65 –40°C to +85°C AD9229ABCPZRL7-65 –40°C to +85°C AD9229ABCPZ-50 –40°C to +85°C AD9229ABCPZRL7-50 –40°C to +85° RoHS ...
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AD9229 NOTES © 2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04418–0–5/10(B) Rev Page ...