AD9262BCPZRL7-5 Analog Devices Inc, AD9262BCPZRL7-5 Datasheet - Page 6

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AD9262BCPZRL7-5

Manufacturer Part Number
AD9262BCPZRL7-5
Description
16 Bit Dual 5MHz Bandwidth ADC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9262BCPZRL7-5

Design Resources
Interfacing ADL5382 to AD9262 as an RF-to-Bits Solution (CN0062)
Number Of Bits
16
Sampling Rate (per Second)
160M
Data Interface
Serial, SPI™
Number Of Converters
2
Power Dissipation (max)
703mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9262
DIGITAL SPECIFICATIONS
All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, 40 MSPS output data rate, AIN = −2.0 dBFS,
unless otherwise noted.
Table 4.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
LOGIC INPUTS (SCLK)
LOGIC INPUTS (SDIO, CSB, RESET)
DIGITAL OUTPUTS
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
Logic Compliance
Differential Input Voltage
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
DRVDD = 3.3 V
DRVDD = 1.8 V
High Level Output Voltage (V
High Level Output Voltage (V
Low Level Output Voltage (V
Low Level Output Voltage (V
High Level Output Voltage (V
High Level Output Voltage (V
Low Level Output Voltage (V
Low Level Output Voltage (V
1
OL
OL
OL
OL
OH
OH
OH
OH
, I
, I
, I
, I
, I
, I
, I
, I
OL
OL
OL
OL
OH
OH
OH
OH
= 1.6 mA)
= 50 μA)
= 1.6 mA)
= 50 μA)
= 50 μA)
= 0.5 mA)
= 50 μA)
= 0.5 mA)
Rev. A | Page 6 of 32
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
0.4
0.3
−60
−60
1.2
0
−50
−10
1.2
0
−10
+40
3.29
3.25
1.79
1.75
Typ
0.8
0.450
20
1
30
2
26
5
CMOS/LVPECL
Max
2
0.5
+60
+60
DRVDD + 0.3
0.8
−75
+10
DRVDD + 0.3
0.8
+10
+135
0.2
0.05
0.2
0.05
Unit
V p-p
V
μA
μA
pF
V
V
μA
μA
pF
V
V
μA
μA
pF
V
V
V
V
V
V
V
V

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