AD9272BSVZ-80 Analog Devices Inc, AD9272BSVZ-80 Datasheet - Page 22

• Manufacturer Part Number: AD9272BSVZ-80
• Description: 12Bit 80 MSPS Octal ADC
• Manufacturer: Analog Devices Inc
• Type: Ultrasound Receiversr

Specifications of AD9272BSVZ-80

• Design Resources: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
• Resolution (bits): 12 b
• Sampling Rate (per Second): 80M
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8V, 3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9272-65EBZ - BOARD EVAL AD9272
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9272
CHANNEL OVERVIEW
Each channel contains both a TGC signal path and a CW Doppler
signal path. Common to both signal paths, the LNA provides user-
adjustable input impedance termination. The CW Doppler path
includes a transconductance amplifier and a crosspoint switch.
The TGC path includes a differential X-AMP® VGA, an antialiasing
filter, and an ADC. Figure 37 shows a simplified block diagram
with external components.
The signal path is fully differential throughout to maximize signal
swing and reduce even-order distortion; however, the LNA is
designed to be driven from a single-ended signal source.
Low Noise Amplifier (LNA)
Good noise performance relies on a proprietary ultralow noise
LNA at the beginning of the signal chain, which minimizes the
noise contribution in the following VGA. Active impedance
control optimizes noise performance for applications that benefit
from input impedance matching.
A simplified schematic of the LNA is shown in Figure 38. LI-x is
capacitively coupled to the source. An on-chip bias generator
establishes dc input bias voltages of around 0.9 V and centers
the output common-mode levels at 1.5 V (AVDD2 divided by
2). A capacitor, C
capacitor, C
SWITCH
T/R
S
, is connected from the LG-x pin to ground.
C
S
Figure 38. Simplified LNA Schematic
LG
C
, of the same value as the input coupling
SWITCH
SH
LI-x
T/R
V
CM
V
C
O
S
+
C
C
SH
C
FB
FB
C
R
R
FB1
FB2
LG
R
R
FB1
FB2
LO-x
LOSW-x
LI-x
LG-x
Figure 37. Simplified Block Diagram of a Single Channel
V
O
–
LNA
V
15.6dB,
17.9dB,
21.3dB
CM
LOSW-x
LG-x
LO-x
C
LG
Rev. C | Page 22 of 44
INTERPOLATOR
ATTENUATOR
–42dB TO 0dB
g
m
GAIN
The LNA supports differential output voltages as high as 4.4 V p-p
with positive and negative excursions of ±1.1 V from a common-
mode voltage of 1.5 V. The LNA differential gain sets the maximum
input signal before saturation. One of three gains is set through
the SPI. The corresponding full-scale input for the gain settings
of 6, 8, and 12 is 733 mV p-p, 550 mV p-p, and 367 mV p-p,
respectively. Overload protection ensures quick recovery time
from large input voltages. Because the inputs are capacitively
coupled to a bias voltage near midsupply, very large inputs can
be handled without interacting with the ESD protection.
Low value feedback resistors and the current-driving capability
of the output stage allow the LNA to achieve a low input-referred
noise voltage of 0.75 nV/√Hz (at a gain of 21.3 dB). This is
achieved with a current consumption of only 27 mA per channel
(80 mW). On-chip resistor matching results in precise single-
ended gains, which are critical for accurate impedance control.
The use of a fully differential topology and negative feedback
minimizes distortion. Low second-order harmonic distortion is
particularly important in second harmonic ultrasound imaging
applications. Differential signaling enables smaller swings at each
output, further reducing third-order distortion.
Recommendation
It is highly recommended that the LG-x pins form a Kelvin type
connection to the input or probe connection ground. Simply
connecting the LG pin to ground near the device can allow
differences in potential to be amplified through the LNA. This
generally shows up as a dc offset voltage that can vary from
channel to channel and part to part given the application and
layout of the PCB (see Figure 38).
SWITCH
ARRAY
POSTAMP
21dB
24dB,
27dB,
30dB
FILTER
PIPELINE
ADC
AD9272
SERIAL
LVDS
CWD[7:0]+
CWD[7:0]–
DOUTx+
DOUTx–