AD9778BSVZ Analog Devices Inc, AD9778BSVZ Datasheet - Page 12

• Manufacturer Part Number: AD9778BSVZ
• Description: IC,D/A CONVERTER,DUAL,14-BIT,CMOS,TQFP,100PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9778BSVZ

• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 300mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9778A-EBZ - BOARD EVALUATION AD9778A
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9776/AD9778/AD9779
Pin
No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
Mnemonic
P2D<12>
P2D<11>
DVDD18
DGND
P2D<10>
P2D<9>
P2D<8>
P2D<7>
P2D<6>
P2D<5>
P2D<4>
P2D<3>
DVDD18
DGND
P2D<2>
P2D<1>
P2D<0>
NC
NC
DVDD18
DVDD33
SYNC_O−
SYNC_O+
DGND
PLL_LOCK
SDO
SDIO
SCLK
CSB
RESET
IRQ
AGND
IPTAT
Description
Port 2, Data Input D12.
Port 2, Data Input D11.
1.8 V Digital Supply.
Digital Common.
Port 2, Data Input D10.
Port 2, Data Input D9.
Port 2, Data Input D8.
Port 2, Data Input D7.
Port 2, Data Input D6.
Port 2, Data Input D5.
Port 2, Data Input D4.
Port 2, Data Input D3.
1.8 V Digital Supply.
Digital Common.
Port 2, Data Input D2.
Port 2, Data Input D1.
Port 2, Data Input D0 (LSB).
No Connect.
No Connect.
1.8 V Digital Supply.
3.3 V Digital Supply.
Differential Synchronization Output.
Differential Synchronization Output.
Digital Common.
PLL Lock Indicator.
SPI Port Data Output.
SPI Port Data Input/Output.
SPI Port Clock.
SPI Port Chip Select Bar.
Reset, Active High.
Interrupt Request.
Analog Common.
Factory Test Pin. Output current is
proportional to absolute temperature,
approximately 10 μA at 25°C with
approximately 20 nA/°C slope. This
pin should remain floating.
Rev. A | Page 12 of 56
Pin
No.
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
The combined differential clock input at the CLK+ and CLK– pins are referred
to as REFCLK.
Mnemonic
VREF
I120
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
Description
Voltage Reference Output.
120 μA Reference Current.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.
Analog Common.
Analog Common.
Differential DAC Current Output,
Channel 2.
Differential DAC Current Output,
Channel 2.
Analog Common.
Auxiliary DAC Current Output,
Channel 2.
Auxiliary DAC Current Output,
Channel 2.
Analog Common.
Auxiliary DAC Current Output,
Channel 1.
Auxiliary DAC Current Output,
Channel 1.
Analog Common.
Differential DAC Current Output,
Channel 1.
Differential DAC Current Output,
Channel 1.
Analog Common.
Analog Common.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.