AD9835BRU Analog Devices Inc, AD9835BRU Datasheet - Page 10

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AD9835BRU

Manufacturer Part Number
AD9835BRU
Description
ADSP-2103KS-405V DDS DAC I.C.
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9835BRU

Rohs Compliant
NO
Rohs Status
RoHS non-compliant
Resolution (bits)
10 b
Master Fclk
50MHz
Tuning Word Width (bits)
32 b
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
For Use With
EVAL-AD9835EBZ - BOARD EVALUATION FOR AD9835
Lead Free Status / RoHS Status

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AD9835
CIRCUIT DESCRIPTION
The AD9835 provides an exciting new level of integration for
the RF/Communications system designer. The AD9835 com-
bines the Numerical Controlled Oscillator (NCO), COS Look-Up
Table, Frequency and Phase Modulators, and a Digital-to-
Analog Converter on a single integrated circuit.
The internal circuitry of the AD9835 consists of three main
sections. These are:
The AD9835 is a fully integrated Direct Digital Synthesis (DDS)
chip. The chip requires one reference clock, one low precision
resistor and eight decoupling capacitors to provide digitally
created sine waves up to 25 MHz. In addition to the generation
of this RF signal, the chip is fully capable of a broad range of
simple and complex modulation schemes. These modulation
schemes are fully implemented in the digital domain allowing
accurate and simple realization of complex modulation algo-
rithms using DSP techniques.
THEORY OF OPERATION
Cos waves are typically thought of in terms of their magnitude
form a(t) = cos ( t). However, these are nonlinear and not easy
to generate except through piece-wise construction. On the
other hand, the angular information is linear in nature. That is,
the phase angle rotates through a fixed angle for each unit of
time. The angular rate depends on the frequency of the signal
by the traditional rate of
Knowing that the phase of a cos wave is linear and given a refer-
ence interval (clock period), the phase rotation for that period
can be determined.
Solving for
Solving for f and substituting the reference clock frequency for
the reference period (1/f
The AD9835 builds the output based on this simple equation.
A simple DDS chip can implement this equation with three
major subcircuits.
Numerical Controlled Oscillator and Phase Modulator
This consists of two frequency select registers, a phase accumu-
lator and four phase offset registers. The main component of the
NCO is a 32-bit phase accumulator which assembles the phase
Numerical Controlled Oscillator (NCO) + Phase Modulator
COS Look-Up Table
Digital-to-Analog Converter
+1
–1
2
0
0
Figure 19. Cos Wave
f = Phase
MCLK
= Phase/ t = 2 f
= 2 f.
Phase =
MAGNITUDE
= t)
PHASE
f
MCLK
t
/2
–10–
component of the output signal. Continuous time signals have a
phase range of 0
sinusoid functions repeat themselves in a periodic manner. The
digital implementation is no different. The accumulator simply
scales the range of phase numbers into a multibit digital word.
The phase accumulator in the AD9835 is implemented with
32 bits. Therefore, in the AD9835, 2 = 2
< 2
where 0 < Phase < 2
The input to the phase accumulator (i.e., the phase step) can be
selected either from the FREQ0 Register or FREQ1 Register
and this is controlled by the FSELECT pin or the FSELECT
bit. NCOs inherently generate continuous phase signals, thus
avoiding any output discontinuity when switching between
frequencies.
Following the NCO, a phase offset can be added to perform
phase modulation using the 12-bit PHASE Registers. The con-
tents of this register are added to the most significant bits of the
NCO. The AD9835 has four PHASE registers, the resolution
of these registers being 2 /4096.
COS Look-Up Table (LUT)
To make the output useful, the signal must be converted from
phase information into a sinusoidal value. Since phase informa-
tion maps directly into amplitude, a ROM LUT converts the
phase information into amplitude. To do this, the digital phase
information is used to address a COS ROM LUT. Although
the NCO contains a 32-bit phase accumulator, the output of the
NCO is truncated to 12 bits. Using the full resolution of the
phase accumulator is impractical and unnecessary as this would
require a look-up table of 2
It is necessary only to have sufficient phase resolution in the
LUTs such that the dc error of the output waveform is domi-
nated by the quantization error in the DAC. This requires the
look-up table to have two more bits of phase resolution than the
10-bit DAC.
Digital-to-Analog Converter
The AD9835 includes a high impedance current source 10-bit
DAC, capable of driving a wide range of loads at different
speeds. Full-scale output current can be adjusted, for optimum
power and external load requirements, through the use of a
single external resistor (R
The DAC is configured for single-ended operation. The load
resistor can be any value required, as long as the full-scale volt-
age developed across it does not exceed the voltage compliance
range. Since full-scale current is controlled by R
ments to R
However, if the DAC full-scale output current is significantly
less than 4 mA, the DAC’s linearity may degrade.
DSP and MPU Interfacing
The AD9835 has a serial interface, with 16 bits being loaded
during each write cycle. SCLK, SDATA and FSYNC are used
to load the word into the AD9835. When FSYNC is taken low,
the AD9835 is informed that a word is being written to the
device. The first bit is read into the device on the next SCLK
falling edge with the remaining bits being read into the device
on the subsequent SCLK falling edges. FSYNC frames the
16 bits; therefore, when 16 SCLK falling edges have occurred,
Phase term is scaled into this range of numbers 0 < Phase
32
– 1. Making these substitutions into the equation above
SET
can balance changes made to the load resistor.
to 2 . Outside this range of numbers, the
f = Phase
32
SET
32
).
entries.
f
MCLK
/2
32
32
. Likewise, the
SET
, adjust-
REV. 0

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