ADA4062-2ARZ-R7 Analog Devices Inc, ADA4062-2ARZ-R7 Datasheet - Page 15

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ADA4062-2ARZ-R7

Manufacturer Part Number
ADA4062-2ARZ-R7
Description
Dual36vLowPwrLowCostJFETInputAmp
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADA4062-2ARZ-R7

Design Resources
8-Pole Active Low-Pass Filter Optimized for Precision, Low Noise, and High Gain Using AD8622 and ADA4062-2 (CN0127)
Amplifier Type
J-FET
Number Of Circuits
2
Slew Rate
3.3 V/µs
Gain Bandwidth Product
1.4MHz
Current - Input Bias
2pA
Voltage - Input Offset
750µV
Current - Supply
165µA
Current - Output / Channel
20mA
Voltage - Supply, Single/dual (±)
8 V ~ 36 V, ±4 V ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Most JFET input amplifiers have phase reversal if either input
exceeds the input common-mode range.
For the ADA4062-2, the output does not phase reverse if one or
both of the inputs exceeds the input voltage range but stays below
the positive supply rail and 0.5 V above the negative supply rail.
With a supply voltage of ±15 V, phase reversal occurs when the
input voltage is a negative signal greater than −14.5 V. This is due
to saturation of the input stage leading to forward biasing of the
gate-drain diode. Phase reversal in ADA4062-2 can be prevented
by using a Schottky diode to clamp the input terminals to each
other. In the simple buffer circuit in Figure 57, D1 protects the
op amp against phase reversal and R limits the input current
that flows into the op amp.
IN
Figure 57. Phase Reversal Solution Circuit
10kΩ
R
IN5711
D1
+V
–V
1/2
SY
SY
ADA4062-2
V
O
Rev. 0 | Page 15 of 20
V
IN
V
OUT
Figure 58. No Phase Reversal
TIME (40µs/DIV)
ADA4062-2
V
SY
= ±15V

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