ADA4627-1BRZ Analog Devices Inc, ADA4627-1BRZ Datasheet - Page 12

• Manufacturer Part Number: ADA4627-1BRZ
• Description: 36V High Performance JFET OpAmp
• Manufacturer: Analog Devices Inc

Specifications of ADA4627-1BRZ

• Design Resources: High Speed Instrumentation Amplifier Using AD8271 and ADA4627-1 (CN0122)
• Amplifier Type: J-FET
• Number Of Circuits: 1
• Slew Rate: 84 V/µs
• Gain Bandwidth Product: 19MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 70µV
• Current - Supply: 7mA
• Current - Output / Channel: 45mA
• Voltage - Supply, Single/dual (±): ±5 V ~ 15 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADA4627-1
THEORY OF OPERATION
The ADA4627-1 is a high speed, unity gain stable amplifier with
excellent dc characteristics. The typical offset voltage of 70 μV
allows the amplifier to be easily configured for high gains
without the risk of excessive output voltage errors. The small
temperature drift of 2 μV/°C ensures a minimum offset voltage
error over the entire temperature range of −40°C to +125°C,
making the amplifier ideal for a variety of sensitive measure-
ment applications in harsh operating environments.
INPUT VOLTAGE RANGE
The ADA4627-1 is not a rail-to-rail input amplifier, thus, care
is required to ensure that both inputs do not exceed the input
voltage range. Under normal negative feedback operating
conditions, the amplifier corrects its output to ensure that
the two inputs are at the same voltage. However, if either input
exceeds the input voltage range, the loop opens and large
currents begin to flow through the ESD protection diodes in
the amplifier.
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the
input voltage exceeds the supply voltage, these ESD diodes can
become forward-biased. Without current limiting, excessive
amounts of current may flow through these diodes, causing
permanent damage to the device. If inputs are subject to over-
voltage, insert appropriate series resistors to limit the diode
current to less than 5 mA.
INPUT OFFSET VOLTAGE ADJUST RANGE
The ADA4627-1 SOIC package has offset adjust pins for
compatibility with some existing designs. The recommended
offset nulling circuit is shown in Figure 37.
With a 100 kΩ potentiometer, the adjustment range is
more than ±11 mV. However, the V
increases by several μV/°C for every millivolt of offset adjust.
The ADA4627-1 has matching thin film resistors that are laser
trimmed at two temperatures to minimize both offset voltage
and offset voltage drift. The offset voltage at room temperature
is less than 0.5 mV, and the offset voltage drift is only a few
μV/°C or less, therefore, it is not recommended to use the offset
adjust pins, especially for offset adjust of a complete signal
Figure 37. Standard Offset Null Circuit
+V
7
2
3
ADA4627-1
S
–V
1
4
S
100kΩ
5
OS
6
temperature drift
Rev. B | Page 12 of 16
chain. Signal chain offset can be addressed with an auto-
zero amplifier used to form a composite amplifier, or if the
ADA4627-1 is at an inverting amplifier stage, it can be modified
easily to create a summing amplifier where a potentiometer can
be added (see Figure 38). The LFCSP package does not have
offset adjust pins.
INPUT BIAS CURRENT
Because the ADA4627-1 has a JFET input stage, the input bias
current, due to the reverse-biased junction, has a leakage
current that approximately doubles every 10°C. The power
dissipation of the part, combined with the thermal resistance of
the package, results in the junction temperature increasing 20 to
30 degrees Centigrade above ambient. This parameter is tested
with high speed ATE equipment, which does not result in the
die temperature reaching equilibrium. This is correlated with
bench measurements to match the guaranteed maximum at
room temperature in Table 2.
The input current can be reduced by keeping the temperature as
low as possible and using a light load on the output.
NOISE CONSIDERATIONS
The JFET input stage offers very low input voltage noise and
input current noise. The thermal noise of a 1 kΩ resistor at
room temperature is 4 nV/√Hz, thus low values of resistance
should be used for dc-coupled inverting and noninverting
amplifier configurations. In the case of transimpedance
amplifiers (TIAs), current noise is more important.
The ADA4627-1 is an excellent choice for both of these appli-
cations. Analog Devices offers a wide variety of low voltage
noise and low current noise op amps in a variety of processes
optimized for different supply voltage ranges. Refer to
Application Note AN-940 for a complete discussion of noise,
calculations, and selection tables for more than three dozen
low noise, op amp families.
THD + N MEASUREMENTS
Total harmonic distortion plus noise (THD + N) is usually
measured with an audio analyzer from Audio Precision, Inc.
The analyzer consists of a low distortion oscillator that is swept
from the starting frequency to the ending frequency. The
Figure 38. Alternate Offset Null Circuit for Inverting Stage
V
IN
+
–
R
IN
200Ω
499kΩ
2
3
ADA4627-1
499kΩ
0.1µF
R
F
+V
–V
S
S
6
100kΩ
V
OUT
+
–