ADE7116ASTZF16-RL Analog Devices Inc, ADE7116ASTZF16-RL Datasheet - Page 45

• Manufacturer Part Number: ADE7116ASTZF16-RL
• Description: 1-Phase Energy Meter IC
• Manufacturer: Analog Devices Inc

Specifications of ADE7116ASTZF16-RL

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit
1
0
1
Table 35. Waveform Mode Register (WAVMODE, Address 0x0D)
Bit
[7:5]
[4:2]
[1: 0]
1
Table 36. No Load Configuration Register (NLMODE, Address 0x0E)
Bit
7
6
[5:4]
This function is not available in the ADE7116, ADE7156, ADE7166, or ADE7566.
This function is not available in the ADE7116, ADE7156, ADE7166, or ADE7566.
Mnemonic
DISVARCMP
IRMSNOLOAD
VANOLOAD
Mnemonic
FREQSEL
WAVEN
Mnemonic
WAV2SEL
WAV1SEL
DTRT
1
Default
0
0
00
Default
000
000
00
Default
0
0
Description
Waveform Sample 2 selection for samples mode.
WAV2SEL
000
001
010
011
100
101
Others
Waveform Sample 1 selection for samples mode.
WAV1SEL
000
001
010
011
100
101
Others
Waveform samples output data rate.
DTRT
00
01
10
11
Description
Setting this bit disables fundamental var gain compensation over line frequency.
Logic 1 enables I
VANOLOAD bits.
Apparent power no load threshold.
VANOLOAD
00
01
10
11
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Description
Configuration bits to select period or frequency measurement for PER_FREQ register
(Address 0x0A).
FREQSEL
0
1
When this bit is set, waveform sampling mode is enabled.
rms
Rev. B | Page 45 of 152
no load threshold detection. The level is defined by the setting of the
Result
PER_FREQ register holds a period measurement.
PER_FREQ register holds a frequency measurement.
Source
Current
Voltage
Active power multiplier output
Reactive power multiplier output
VA multiplier output
I
Reserved
Source
Current
Voltage
Active power multiplier output
Reactive power multiplier output
VA multiplier output
I
Reserved
Update Rate (Clock = f
25.6 kSPS (clock/32)
12.8 kSPS (clock/64)
6.4 kSPS (clock/128)
3.2 kSPS (clock/256)
Result
No load detection disabled
No load detection enabled with threshold = 0.030% of full scale
No load detection enabled with threshold = 0.015% of full scale
No load detection enabled with threshold = 0.0075% of full scale
rms
rms
LPF output
LPF output (low 24-bit)
CORE
/5 = 819.2 kHz)
1
1