ADF4360-9BCPZ Analog Devices Inc, ADF4360-9BCPZ Datasheet - Page 2

Synthesizer And VCO

ADF4360-9BCPZ

Manufacturer Part Number
ADF4360-9BCPZ
Description
Synthesizer And VCO
Manufacturer
Analog Devices Inc
Type
Fanout Distribution, Integer N Synthesizer (RF)r
Datasheet

Specifications of ADF4360-9BCPZ

Pll
Yes
Input
CMOS
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
400MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-LFCSP
Frequency-max
400MHz
Number Of Elements
1
Supply Current
5mA
Pll Input Freq (min)
10MHz
Pll Input Freq (max)
250MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
LFCSP EP
Output Frequency Range
1.1 to 400MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Pin Count
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADF4360-9
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Circuit Description......................................................................... 10
REVISION HISTORY
3/08—Rev. 0 to Rev. A
Changes to Table 1 ........................................................................... 3
Changes to Figure 23...................................................................... 14
Changes to Output Matching Section.......................................... 23
1/08—Revision 0: Initial Version
Timing Characteristics ................................................................ 5
Transistor Count........................................................................... 6
ESD Caution.................................................................................. 6
Reference Input Section............................................................. 10
N Counter.................................................................................... 10
R Counter .................................................................................... 10
PFD and Charge Pump.............................................................. 10
Lock Detect ................................................................................. 10
Rev. A | Page 2 of 24
Applications..................................................................................... 20
Outline Dimensions ....................................................................... 24
Input Shift Register .................................................................... 10
VCO ............................................................................................. 11
Output Stage................................................................................ 12
DIVOUT Stage............................................................................ 12
Latch Structure ........................................................................... 13
Power-Up..................................................................................... 17
Control Latch .............................................................................. 18
N Counter Latch......................................................................... 19
R Counter Latch ......................................................................... 19
Choosing the Correct Inductance Value................................. 20
Encode Clock for ADC.............................................................. 20
GSM Test Clock .......................................................................... 21
Interfacing ................................................................................... 22
PCB Design Guidelines for Chip Scale Package .................... 22
Output Matching ........................................................................ 23
Ordering Guide .......................................................................... 24

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