ADG633YRU Analog Devices Inc, ADG633YRU Datasheet - Page 7

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ADG633YRU

Manufacturer Part Number
ADG633YRU
Description
IC,ANALOG SWITCH,TRIPLE,SPDT,CMOS,TSSOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Analog Switchr
Datasheet

Specifications of ADG633YRU

Rohs Compliant
NO
Rohs Status
RoHS non-compliant
Function
Switch
Circuit
3 x SPDT
On-state Resistance
75 Ohm
Voltage Supply Source
Single, Dual Supply
Voltage - Supply, Single/dual (±)
2 V ~ 12 V, ±2 V ~ 6 V
Current - Supply
0.01µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Multiplexer Configuration
Triple SPDT
Number Of Inputs
3
Number Of Outputs
6
Number Of Channels
3
Analog Switch On Resistance
300@3.6VOhm
Analog Switch Turn On Time
310ns
Analog Switch Turn Off Time
40ns
Package Type
TSSOP
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
2V
Single Supply Voltage (typ)
3/5/9V
Single Supply Voltage (max)
12V
Dual Supply Voltage (min)
±2V
Dual Supply Voltage (typ)
±3/±5V
Dual Supply Voltage (max)
±6V
Power Dissipation
0.00001W
Supply Current
0.001mA
Mounting
Surface Mount
Pin Count
16
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Package
16TSSOP
Maximum On Resistance
300@3.6V Ohm
Maximum Propagation Delay Bus To Bus
90@±5V|150@5V|300@2.7V ns
Maximum High Level Output Current
20 mA
Maximum Turn-off Time
40@±5V ns
Maximum Turn-on Time
310@3.6V ns
Switch Architecture
SPDT
Power Supply Type
Single|Dual
Lead Free Status / Rohs Status
Not Compliant

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Manufacturer
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Manufacturer:
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
N/A
Table 6. ADG633 Truth Table
A2
X
0
0
0
0
1
1
1
1
1
X = the logic state does not matter; it can be either 0 or 1.
1
Pin No.
A1
X
0
0
1
1
0
0
1
1
1
LFCSP
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
EP
A0
X
0
1
0
1
0
1
0
1
1
GND
Figure 2. TSSOP Pin Configuration
S2A
S3A
S2B
S3B
EN
1
0
0
0
0
0
0
0
0
V
EN
D3
SS
Mnemonic
S2B
S2A
S3B
D3
S3A
EN
V
GND
A2
A1
A0
S1A
S1B
D1
D2
V
EP
1
2
3
4
5
6
7
8
SS
DD
Switch S1A-D1
Off
On
Off
On
Off
On
Off
On
Off
(Not to Scale)
ADG633
TOP VIEW
Description
Source Terminal of Multiplexer 2. Can be an input or output.
Source Terminal of Multiplexer 2. Can be an input or output.
Source Terminal of Multiplexer 3. Can be an input or output.
Drain Terminal of Multiplexer 3. Can be an input or output.
Source Terminal of Multiplexer 3. Can be an input or output.
Digital Control Input. Disables all multiplexers when set high.
Most Negative Power Supply Terminal. Tie this pin to GND when using the device with single-supply
voltages.
Ground (0 V) Reference.
Digital Control Input.
Digital Control Input.
Digital Control Input.
Source Terminal of Multiplexer 1. Can be an input or output.
Source Terminal of Multiplexer 1. Can be an input or output.
Drain Terminal of Multiplexer 1. Can be an input or output.
Drain Terminal of Multiplexer 2. Can be an input or output.
Most Positive Power Supply Terminal.
Exposed Paddle. The exposed paddle can be left floating or be tied to V
16
15
14
13
12
11
10
9
V
D2
D1
S1B
S1A
A0
A1
A2
DD
Switch S1B-D1
Off
Off
On
Off
On
Off
On
Off
On
Rev. A | Page 7 of 16
Switch S2A-D2
Off
On
On
Off
Off
On
On
Off
Off
Switch Condition
Switch S2B-D2
Off
Off
Off
On
On
Off
Off
On
On
NOTES
1. THE EXPOSED PADDLE CAN BE LEFT FLOATING
OR BE TIED TO V
S3B
S3A
EN
D3
Figure 3. LFCSP Pin Configuration
1
2
3
4
(Not to Scale)
DD
ADG633
TOP VIEW
PIN 1
INDICATOR
, V
Switch S2A-D3
Off
On
On
On
On
Off
Off
Off
Off
SS
, OR GND.
DD
, V
SS
, or GND.
12 D1
11 S1B
10 S1A
9 A0
Switch S3B-D3
Off
Off
Off
Off
Off
On
On
On
On
ADG633

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