ADM1490EBRMZ Analog Devices Inc, ADM1490EBRMZ Datasheet - Page 10

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ADM1490EBRMZ

Manufacturer Part Number
ADM1490EBRMZ
Description
5V Full Duplex RS-485 Tranceiver I.C.
Manufacturer
Analog Devices Inc
Type
Transceiverr
Datasheet

Specifications of ADM1490EBRMZ

Number Of Drivers/receivers
1/1
Protocol
RS422, RS485
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADM1490EBRMZ
Manufacturer:
NSC
Quantity:
128
ADM1490E/ADM1491E
THEORY OF OPERATION
The ADM1490E/ADM1491E are RS-422/RS-485 transceivers that
operate from a single 5 V ± 5% power supply. The ADM1490E/
ADM1491E are intended for balanced data transmission and
comply with both TIA/EIA-485-A and TIA/EIA-422-B. Each
device contains a differential line driver and a differential line
receiver and is suitable for full-duplex data transmission.
The input impedance of the ADM1490E/ADM1491E is 12 kΩ,
allowing up to 32 transceivers on the differential bus. A thermal
shutdown circuit prevents excessive power dissipation caused by
bus contention or by output shorting. This feature forces the driver
output into a high impedance state if, during fault conditions,
a significant temperature increase is detected in the internal
driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1490E/ADM1491E feature very low propagation delay,
ensuring maximum baud rate operation. The balanced driver
ensures distortion-free transmission.
Another important specification is a measure of the skew between
the complementary outputs. Excessive skew impairs the noise
immunity of the system and increases the amount of electro-
magnetic interference (EMI).
TRUTH TABLES
Table 6. Abbreviations in Truth Tables
Letter
H
I
L
X
Z
Table 7. Transmitting
DE
H
H
L
Table 8. Receiving
RE
L
L
L
L
H
Inputs
A − B
≥ +0.2 V
≤ −0.2 V
−0.2 V ≤ A − B ≤ +0.2 V
Inputs open
X
DI
H
L
X
Description
High level
Indeterminate
Low level
Irrelevant
High impedance (off )
Inputs
Z
L
H
Z
Outputs
Y
H
L
Z
Output
RO
H
L
I
H
Z
Rev. C | Page 10 of 16
ESD TRANSIENT PROTECTION SCHEME
The ADM1490E/ADM1491E use protective clamping
structures on their inputs and outputs to clamp the voltage to a
safe level and dissipate the energy present in ESD (electrostatic).
The protection structure achieves ESD protection up to ±8 kV
human body model (HBM).
ESD Testing
Two coupling methods are used for ESD testing: contact dis-
charge and air gap discharge. Contact discharge calls for a direct
connection to the unit being tested; air gap discharge uses a higher
test voltage but does not make direct contact with the unit under
test. With air discharge, the discharge gun is moved toward the
unit under test, developing an arc across the air gap; therefore,
the term air discharge. This method is influenced by humidity,
temperature, barometric pressure, distance, and rate of closure
of the discharge gun. The contact discharge method, though
less realistic, is more repeatable and is gaining acceptance and
preference over the air gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can cause
failures in unprotected semiconductors. Catastrophic destruction
can occur immediately because of arcing or heating. Even if catas-
trophic failure does not occur immediately, the device can suffer
from parametric degradation, resulting in degraded performance.
The cumulative effects of continuous exposure can eventually
lead to complete failure.
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable may result in a static dis-
charge that can damage or destroy the interface product connected
to the I/O port. It is, therefore, extremely important to have high
levels of ESD protection on the I/O lines.
The ESD discharge can induce latch-up in the device under test.
Therefore, it is important to conduct ESD testing on the I/O pins
while power is applied to the device. This type of testing is more
representative of a real-world I/O discharge in which the equip-
ment is operating normally when the discharge occurs.
NOTES
1. THE ESD TEST METHOD USED IS THE
GENERATOR
HUMAN BODY MODEL (±8kV) WITH
R2 = 1500Ω AND C1 = 100pF.
VOLTAGE
HIGH
Figure 27. ESD Generator
C1
R2
UNDER TEST
DEVICE

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