ADN2819ACPZ-CML-RL Analog Devices Inc, ADN2819ACPZ-CML-RL Datasheet - Page 2

IC,Clock/Data Recovery,LLCC,48PIN,CERAMIC

ADN2819ACPZ-CML-RL

Manufacturer Part Number
ADN2819ACPZ-CML-RL
Description
IC,Clock/Data Recovery,LLCC,48PIN,CERAMIC
Manufacturer
Analog Devices Inc
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of ADN2819ACPZ-CML-RL

Output
CML
Frequency - Max
2.7GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.7GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Input
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADN2819
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Pin Configuration and Function Descriptions............................. 7
Definition of Terms.......................................................................... 9
Theory of Operation ...................................................................... 12
Functional Description .................................................................. 14
REVISION HISTORY
5/04—Data Sheet Changed from Rev. A to Rev. B
Updated Format..............................................................Universal
Changes to Specifications ............................................................ 3
Changes to Table 7 and Table 8................................................. 15
Updated Outline Dimensions ................................................... 21
Changes to Ordering Guide ...................................................... 21
1/03—Data Sheet Changed from Rev. 0 to Rev. A
Changes to Table IV ................................................................... 12
Updated OUTLINE DIMENSIONS ........................................ 16
Thermal Characteristics .............................................................. 6
ESD Caution.................................................................................. 6
Maximum, Minimum, and Typical Specifications ................... 9
Input Sensitivity and Input Overdrive....................................... 9
Single-Ended vs. Differential ...................................................... 9
LOS Response Time ................................................................... 10
Jitter Specifications..................................................................... 10
Multirate Clock and Data Recovery......................................... 14
Rev. B | Page 2 of 24
Applications Information .............................................................. 17
Outline Dimensions ....................................................................... 21
Limiting Amplifier ..................................................................... 14
Slice Adjust .................................................................................. 14
Loss of Signal (LOS) Detector .................................................. 14
Reference Clock.......................................................................... 14
Lock Detector Operation .......................................................... 15
Squelch Mode ............................................................................. 16
Test Modes: Bypass and Loopback........................................... 16
PCB Design Guidelines ............................................................. 17
Choosing AC-Coupling Capacitors ......................................... 19
DC-Coupled Application .......................................................... 20
LOL Toggling During Loss of Input Data............................... 20
Ordering Guide .......................................................................... 21

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