ADP5588-EVALZ Analog Devices Inc, ADP5588-EVALZ Datasheet - Page 7

• Manufacturer Part Number: ADP5588-EVALZ
• Description: Column Keypad Scanner & GPIO Port Expand
• Manufacturer: Analog Devices Inc

Specifications of ADP5588-EVALZ

• Main Purpose: Interface, GPIO Expander
• Embedded: No
• Utilized Ic / Part: ADP5588
• Primary Attributes: 8-Bit 18-Port GPIO Expander
• Secondary Attributes: I²C Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
The ADP5588 is a GPIO expander that can be configured either
as an 18-I/O port expander or as a 10 column × 8 row keypad
matrix (80 keys maximum). It is ideal for cellular phone designs
and other portable devices that require a large extended keypad
and/or expanded I/Os (see the Applications Information section
for various configurations). When smaller size keypads are
required, unused GPIOs in the keypad matrix can be used as
I/Os (GPOs and GPIs). Two of the columns (C8 and C9) can
also be configured as comparator inputs for single or dual light
sensors. All GPIOs (rows and columns) default as GPIs at power-
up with pull-ups and debounce enabled.
KEYPAD OPERATION
Any number of rows and columns, up to 10 columns × 8 rows,
can be configured to be part of the keypad matrix. The rows
and columns that make up the keypad matrix must be con-
figured by setting the corresponding bits in Register 0x1D
through Register 0x1F. Keys on the keypad matrix appear on
the key event table with a decimal value of 1 (0x01 hexidecimal
or 0000001 binary) and run through 80 decimals (0x50 hexi-
decimal or 1010000 binary). See Table 10 for key event number
assignments. The keypad, in idle mode, is configured with
columns being driven low and rows as inputs high with pull-ups.
V
CC
SCL
SDA
RST
INT
GND
SDA
SCL
RST
V
INT
CC
19
21
23
22
20
24
G7
A7
B7
C7
D7
E7
F7
H7
J7
I7
1
A6
B6
C6
D6
G6
H6
E6
F6
J6
REGISTERS
I6
2
CONTROL
A5
B5
C5
D5
E5
F5
G5
H5
J5
I5
3
G4
A4
B4
C4
D4
E4
F4
H4
J4
I4
4
A3
B3
C3
D3
G3
E3
F3
H3
J3
I3
5
Figure 4. Typical Operating Circuit
INTERFACE
A2
B2
C2
D2
G2
H2
E2
F2
J2
CONTROL
I2
6
A1
B1
C1
D1
E1
G1
H1
F1
J1
I1
7
Rev. B | Page 7 of 28
A0
B0
C0
D0
G0
H0
E0
F0
J0
I0
8
9
VOLTAGE
VOLTAGE
10
REF
REF
11
Table 10. Key Event Number Assignment Table
Row
R0
R1
R2
R3
R4
R5
R6
R7
When one key press or multiple key presses (short between
coumn and row) occur, the internal state machine checks the
row pins to determine which one is driven low and then triggers
an interrupt. The state machine then starts a key scan cycle to
determine which keys are pressed. After a key has been pressed
for 25 ms, the state machine sets the appropriate key(s) in the
key event status register with the key-pressed bits set (the MSB
in the key event register) in the order detected. If the KE_IEN
field in Register 0x01 is set, the state machine then sets the
KE_INT field in Register 0x01 and generates an interrupt to the
host processor.
12
C9
C8
13
C0
1
11
21
31
41
51
61
71
14
ADP5588
15
C1
2
12
22
32
42
52
62
72
C9
C8
16
C2
4
13
23
33
43
53
63
73
18
17
C9
C8
C3
4
14
24
34
44
54
64
74
0.1µF
0.1µF
C4
5
15
25
35
45
55
65
75
C5
6
16
26
36
46
56
66
76
V
C6
7
17
27
37
47
57
67
77
CC
C7
8
18
28
38
48
58
68
78
ADP5588
C8
9
19
29
39
49
59
69
79
C9
10
20
30
40
50
60
70
80