ADSP-21266SKSTZ-1D Analog Devices Inc, ADSP-21266SKSTZ-1D Datasheet - Page 44

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ADSP-21266SKSTZ-1D

Manufacturer Part Number
ADSP-21266SKSTZ-1D
Description
150 MHz, 32Bit DSP Processor PB Free
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Fixed/Floating Pointr
Datasheet

Specifications of ADSP-21266SKSTZ-1D

Interface
DAI, SPI
Clock Rate
150MHz
Non-volatile Memory
ROM (512 kB)
On-chip Ram
256kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21266SKSTZ-1D
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADSP-21266
SURFACE-MOUNT DESIGN
Table 39
for Surface-Mount Design and Land Pattern Standard.
Table 39. BGA_ED Data for Use with Surface-Mount Design
ORDERING GUIDE
Analog Devices offers a wide variety of audio algorithms and combinations to run on the ADSP-21266 DSP. For a complete list, visit our
website at www.analog.com/SHARC.
1
2
3
4
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
Package
136-Lead CSP_BGA (BC-136)
Model
ADSP-21266SKSTZ-1B
ADSP-21266SKSTZ-2B
ADSP-21266SKBCZ-2B
ADSP-21266SKSTZ-1C
ADSP-21266SKSTZ-2C
ADSP-21266SKBCZ-2C
ADSP-21266SKSTZ-1D
ADSP-21266SKSTZ-2D
ADSP-21266SKBCZ-2D
Z = RoHS Compliant Part.
B at end of part number indicates Rev. 0.1 silicon. See
C and D at end of part number indicate Rev. 0.2 silicon. See
Referenced temperature is ambient temperature.
1, 2, 3
is provided as an aide to PCB design. For industry-standard design recommendations, refer to IPC-7351, Generic Requirements
Temperature
Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
4
Ball Attach Type
Solder Mask Defined (SMD)
D03758-0-10/07(C)
Table 2 on Page 6
Instruction
Rate
150 MHz
200 MHz
200 MHz
150 MHz
200 MHz
200 MHz
150 MHz
200 MHz
200 MHz
Table 2 on Page 6
Rev. C | Page 44 of 44 | October 2007
for multichannel surround-sound decoder algorithms in on-chip B ROM.
On-Chip
SRAM
2M bit
2M bit
2M bit
2M bit
2M bit
2M bit
2M bit
2M bit
2M bit
for multichannel surround-sound decoder algorithms in on-chip C and D ROM.
ROM
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
4M bit
Solder Mask Opening
0.4 mm
Operating
Voltage
1.2 INT/3.3 EXT V 144-Lead LQFP
1.2 INT/3.3 EXT V 144-Lead LQFP
1.2 INT/3.3 EXT V 136-Ball CSP_BGA
1.2 INT/3.3 EXT V 144-Lead LQFP
1.2 INT/3.3 EXT V 144-Lead LQFP
1.2 INT/3.3 EXT V 136-Ball CSP_BGA
1.2 INT/3.3 EXT V 144-Lead LQFP
1.2 INT/3.3 EXT V 144-Lead LQFP
1.2 INT/3.3 EXT V 136-Ball CSP_BGA
Package
Description
Ball Pad Size
0.53 mm
Package
Option
ST-144
ST-144
BC-136
ST-144
ST-144
BC-136
ST-144
ST-144
BC-136

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